RD53A DAQ Development

Introduction

RD53 is a prospective ASIC for the HL-LHC upgrade.

/opt/Xilinx/Vivado/2016.4/data/xicom/cable_drivers/lin64/install_script/install_drivers
sudo ./install_drivers

FE-I4 Readout Test

* Gitlab repository

*

  1. FPGA Hardware and Additional apparatuses
    • FPGA Hardware
      • Prerequisites
        Target devices : Virtex-7 VC707 Evaluation Platform (xc7vx485tffg1761-2)
        Tool Version : Xilinx Vivado 2015.4 or later tools
        If you are using Kintex-7 KC705 Evaluation Platform, you need to change the SiTCP module in the firmware to XC7KSiTCPlib32k.

    • FEI4B Single Chip Card
    • RJ45/FMC - SLVS/LVDS Conversion Board
      • TB-FMCL-PH board (inrevium TOKYO ELECTRON DEVICE)
        - used for conversion between Samtec FMC connector (Low-Pin Count) and 2.54mm pitch pin header.
      • SLVS <-> LVDS level shiter designed by Ryo Nagai: LVDS2SLVS_Pins.zip

    • Hardware setup
      • Example recipe
        • Power supply for SEABAS2
          • VDDA: +1.5 V, current limit 0.7 A
          • VDDD: +1.5 V, current limit 0.4 A (Not : 1.2 V!!)
        • Ethernet cable x2 (To use 1000BASE-T, use a Cat 5 cable or later. One between a conversion board and a SCC should be metal shielded to match GNDs.)
        • SourceMeter for the silicon sensor

          VC707_setup.jpg
  2. DAQ Software

    • SEABAS DAQ for ATLAS Pixel Upgrade
      • source : trunk/multi_chip_FEI4/Software_SEABAS2
      • SiTCP IP Address : Default (192.168.10.16)

    • How to config FEI4
      • For example, execute on your terminal run 1 0111 which is a command to do "Digital Injection and mask chip_1 to chip3."
        Please refer to SEABAS2 DAQ Usages.

  3. Release

YARR

Tips

RD53A probe card

RD53AProbeCard

-- Ryo Nagai - 2016-10-17

Topic attachments
I Attachment History Action Size Date Who Comment
Compressed Zip archivezip LVDS2SLVS_Pins.zip r1 manage 212.2 K 2017-05-26 - 10:16 AtlasjSilicon  
PDFpdf OFTC_0.pdf r1 manage 605.1 K 2017-05-25 - 05:43 AtlasjSilicon  
PDFpdf OFTC_1.pdf r1 manage 1740.3 K 2017-05-25 - 05:44 AtlasjSilicon  
PDFpdf OFTC_2_1.pdf r1 manage 698.8 K 2017-05-25 - 05:44 AtlasjSilicon  
PDFpdf OFTC_2_2.pdf r1 manage 2387.5 K 2017-05-25 - 05:44 AtlasjSilicon  
PDFpdf OFTC_2_3.pdf r1 manage 1986.6 K 2017-05-25 - 05:44 AtlasjSilicon  
PDFpdf OFTC_2_4.pdf r1 manage 4259.7 K 2017-05-25 - 05:44 AtlasjSilicon  
PDFpdf OFTC_3.pdf r1 manage 717.2 K 2017-05-25 - 05:44 AtlasjSilicon  
PDFpdf OFTC_4_1.pdf r1 manage 448.6 K 2017-05-25 - 05:44 AtlasjSilicon  
PDFpdf OFTC_4_2.pdf r1 manage 2451.2 K 2017-05-25 - 05:44 AtlasjSilicon  
PDFpdf OFTC_4_3.pdf r1 manage 2801.5 K 2017-05-25 - 05:44 AtlasjSilicon  
PDFpdf OFTC_5.pdf r1 manage 384.8 K 2017-05-25 - 05:45 AtlasjSilicon  
PDFpdf OFTC_6.pdf r1 manage 1347.2 K 2017-05-25 - 05:45 AtlasjSilicon  
PDFpdf OFTC_7.pdf r1 manage 3128.1 K 2017-05-25 - 05:45 AtlasjSilicon  
PDFpdf OFTC_8.pdf r1 manage 695.8 K 2017-05-25 - 05:45 AtlasjSilicon  
PDFpdf OFTC_9.pdf r1 manage 1439.0 K 2017-05-25 - 05:45 AtlasjSilicon  
PDFpdf OFTC_lab_c1_rev20.pdf r1 manage 122.7 K 2017-05-25 - 05:45 AtlasjSilicon  
PDFpdf OFTC_lab_i1_rev11.pdf r1 manage 105.8 K 2017-05-25 - 05:45 AtlasjSilicon  
PDFpdf OFTC_lab_i2_rev13.pdf r1 manage 104.8 K 2017-05-25 - 05:45 AtlasjSilicon  
PDFpdf OFTC_lab_s1_rev20.pdf r1 manage 131.0 K 2017-05-25 - 05:45 AtlasjSilicon  
PDFpdf OFTC_preparation.pdf r1 manage 2018.1 K 2017-05-25 - 05:46 AtlasjSilicon  
PDFpdf OFTC_ref_note.pdf r1 manage 47.7 K 2017-05-25 - 05:46 AtlasjSilicon  
PDFpdf references.pdf r1 manage 871.8 K 2017-05-25 - 06:19 AtlasjSilicon  
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Topic revision: r25 - 2018-02-09 - KojiNakamura
 
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