RD53ADAQdevelopment < Main

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---+ RD53A DAQ Development

%TOC%

---++ Introduction

RD53 is a prospective ASIC for the HL-LHC upgrade.
<verbatim>/opt/Xilinx/Vivado/2016.4/data/xicom/cable_drivers/lin64/install_script/install_drivers
sudo ./install_drivers</verbatim>

---++ FE-I4 Readout Test

* [[https://gitlab.cern.ch/ysawada/fei4readout_vc707][Gitlab repository<br /><br />]]*
   1 *FPGA Hardware and Additional apparatuses*
      * FPGA Hardware
         * Prerequisites<br />Target devices : Virtex-7 VC707 Evaluation Platform (xc7vx485tffg1761-2)<br />Tool Version : Xilinx Vivado 2015.4 or later tools<br />If you are using Kintex-7 KC705 Evaluation Platform, you need to change the SiTCP module in the firmware to XC7KSiTCPlib32k.<br /><br />
      * FEI4B Single Chip Card
         * [[https://wiki.phys.hawaii.edu/pub/Main/BeastTechnicalDocumentation/FE-I4B_V2.0.pdf][Manual FE-I4B_V2.0.pdf]] -
         * Appearance<br /><br /><img alt="FEI4BSCC.jpg" height="160" src="%ATTACHURL%/FEI4BSCC.jpg" width="170" /><br /><br />
      * RJ45/FMC - SLVS/LVDS Conversion Board
         * TB-FMCL-PH board (inrevium TOKYO ELECTRON DEVICE)<br />- used for conversion between Samtec FMC connector (Low-Pin Count) and 2.54mm pitch pin header.
         * SLVS &lt;-&gt; LVDS level shiter designed by Ryo Nagai: <font color="#0066cc"> [[%ATTACHURL%/LVDS2SLVS_Pins.zip][LVDS2SLVS_Pins.zip]] </font><br /><br />
      * Hardware setup
         * Example recipe
            * Power supply for SEABAS2
               * VDDA: +1.5 V, current limit 0.7 A
               * VDDD: +1.5 V, current limit 0.4 A (Not : 1.2 V!!)
            * Ethernet cable x2 (To use 1000BASE-T, use a Cat 5 cable or later. One between a conversion board and a SCC should be metal shielded to match GNDs.)
            * SourceMeter for the silicon sensor<br /><br /><img alt="VC707_setup.jpg" height="286" src="%ATTACHURL%/VC707_setup.jpg" style="background-color: transparent;" width="509" />
   1 <b>DAQ Software<br /><br /></b>
      * [[https://svnweb.cern.ch/trac/seabaspixeldaq][SEABAS DAQ for ATLAS Pixel Upgrade]]
         * source : trunk/multi_chip_FEI4/Software_SEABAS2
         * SiTCP IP Address : Default (192.168.10.16)<br /><br />
      * How to config FEI4
         * For example, execute on your terminal *run 1 0111* which is a command to do "Digital Injection and mask chip_1 to chip3."<br />Please refer to [[https://svnweb.cern.ch/trac/seabaspixeldaq/wiki/SEABAS2%20DAQ%20Usage][SEABAS2 DAQ Usages]].<br /><br />
   1 <b>Release<br /><br /></b>
      * Firmware for VC707 to readout FE-I4B SCC - 2017.08.10 (Sawada.Y)<br />- [[http://osksn2.hep.sci.osaka-u.ac.jp/~sawada/fpga/fei4readout_vc707_prj-1.1.xpr.zip][fei4readout_vc707_prj-1.1.xpr.zip]] - Latest
---++ YARR
   * Git : https://gitlab.cern.ch/YARR/YARR or https://github.com/Yarr
   * Documentation : http://yarr.readthedocs.io/
   * Hardware : [[https://www.reflexces.com/products-solutions/cots-boards/xilinx/xpressk7][XpressK7 Board]]
---++ Tips
   * Text on FPGA training
      * prepapration: [[%ATTACHURL%/OFTC_preparation.pdf][OFTC_preparation.pdf]]
      * <p>main body: [[%ATTACHURL%/OFTC_0.pdf][OFTC_0.pdf]], [[%ATTACHURL%/OFTC_1.pdf][OFTC_1.pdf]], [[%ATTACHURL%/OFTC_2_1.pdf][OFTC_2_1.pdf]], [[%ATTACHURL%/OFTC_2_2.pdf][OFTC_2_2.pdf]], [[%ATTACHURL%/OFTC_2_3.pdf][OFTC_2_3.pdf]], [[%ATTACHURL%/OFTC_2_4.pdf][OFTC_2_4.pdf]], [[%ATTACHURL%/OFTC_3.pdf][OFTC_3.pdf]], [[%ATTACHURL%/OFTC_4_1.pdf][OFTC_4_1.pdf]], [[%ATTACHURL%/OFTC_4_2.pdf][OFTC_4_2.pdf]], [[%ATTACHURL%/OFTC_4_3.pdf][OFTC_4_3.pdf]], [[%ATTACHURL%/OFTC_5.pdf][OFTC_5.pdf]], [[%ATTACHURL%/OFTC_6.pdf][OFTC_6.pdf]], [[%ATTACHURL%/OFTC_7.pdf][OFTC_7.pdf]], [[%ATTACHURL%/OFTC_8.pdf][OFTC_8.pdf]], [[%ATTACHURL%/OFTC_9.pdf][OFTC_9.pdf]]</p>
      * training course: [[%ATTACHURL%/OFTC_lab_c1_rev20.pdf][OFTC_lab_c1_rev20.pdf]], [[%ATTACHURL%/OFTC_lab_s1_rev20.pdf][OFTC_lab_s1_rev20.pdf]], [[%ATTACHURL%/OFTC_lab_i1_rev11.pdf][OFTC_lab_i1_rev11.pdf]], [[%ATTACHURL%/OFTC_lab_i2_rev13.pdf][OFTC_lab_i2_rev13.pdf]]
      * reference: [[%ATTACHURL%/OFTC_ref_note.pdf][OFTC_ref_note.pdf]], [[%ATTACHURL%/references.pdf][references.pdf]]
   * Useful links
      * [[http://qiita.com/search?q=FPGA][Qiita]]
      * [[http://electronics.stackexchange.com/][Electrical Engineering]]
      * [[https://sitcp.bbtech.co.jp/][SiTCP User Community]]
      * [[http://dora.bk.tsukuba.ac.jp/~takeuchi/?%E9%9B%BB%E6%B0%97%E5%9B%9E%E8%B7%AF][Takeuchi's memo for electric circuit]]
---+ RD53A probe card

RD53AProbeCard

-- %USERSIG{RyoNagai - 2016-10-17}%

Attachments

Topic attachments
I	Attachment	History	Action	Size	Date	Who
zip	LVDS2SLVS_Pins.zip	r1	manage	212.2 K	2017-05-26 - 10:16	AtlasjSilicon
pdf	OFTC_0.pdf	r1	manage	605.1 K	2017-05-25 - 05:43	AtlasjSilicon
pdf	OFTC_1.pdf	r1	manage	1740.3 K	2017-05-25 - 05:44	AtlasjSilicon
pdf	OFTC_2_1.pdf	r1	manage	698.8 K	2017-05-25 - 05:44	AtlasjSilicon
pdf	OFTC_2_2.pdf	r1	manage	2387.5 K	2017-05-25 - 05:44	AtlasjSilicon
pdf	OFTC_2_3.pdf	r1	manage	1986.6 K	2017-05-25 - 05:44	AtlasjSilicon
pdf	OFTC_2_4.pdf	r1	manage	4259.7 K	2017-05-25 - 05:44	AtlasjSilicon
pdf	OFTC_3.pdf	r1	manage	717.2 K	2017-05-25 - 05:44	AtlasjSilicon
pdf	OFTC_4_1.pdf	r1	manage	448.6 K	2017-05-25 - 05:44	AtlasjSilicon
pdf	OFTC_4_2.pdf	r1	manage	2451.2 K	2017-05-25 - 05:44	AtlasjSilicon
pdf	OFTC_4_3.pdf	r1	manage	2801.5 K	2017-05-25 - 05:44	AtlasjSilicon
pdf	OFTC_5.pdf	r1	manage	384.8 K	2017-05-25 - 05:45	AtlasjSilicon
pdf	OFTC_6.pdf	r1	manage	1347.2 K	2017-05-25 - 05:45	AtlasjSilicon
pdf	OFTC_7.pdf	r1	manage	3128.1 K	2017-05-25 - 05:45	AtlasjSilicon
pdf	OFTC_8.pdf	r1	manage	695.8 K	2017-05-25 - 05:45	AtlasjSilicon
pdf	OFTC_9.pdf	r1	manage	1439.0 K	2017-05-25 - 05:45	AtlasjSilicon
pdf	OFTC_lab_c1_rev20.pdf	r1	manage	122.7 K	2017-05-25 - 05:45	AtlasjSilicon
pdf	OFTC_lab_i1_rev11.pdf	r1	manage	105.8 K	2017-05-25 - 05:45	AtlasjSilicon
pdf	OFTC_lab_i2_rev13.pdf	r1	manage	104.8 K	2017-05-25 - 05:45	AtlasjSilicon
pdf	OFTC_lab_s1_rev20.pdf	r1	manage	131.0 K	2017-05-25 - 05:45	AtlasjSilicon
pdf	OFTC_preparation.pdf	r1	manage	2018.1 K	2017-05-25 - 05:46	AtlasjSilicon
pdf	OFTC_ref_note.pdf	r1	manage	47.7 K	2017-05-25 - 05:46	AtlasjSilicon
pdf	references.pdf	r1	manage	871.8 K	2017-05-25 - 06:19	AtlasjSilicon

Topic revision: r25 - 2018-02-09 - KojiNakamura