Difference: RD53ADAQdevelopment (23 vs. 24)

Revision 242017-08-18 - AtlasjSilicon

Line: 1 to 1
 
META TOPICPARENT name="WebHome"

RD53A DAQ Development

Introduction

Line: 12 to 12
 

FE-I4 Readout Test

Changed:
<
<
Git
>
>
* Gitlab repository

*
 
  1. FPGA Hardware and Additional apparatuses
    • FPGA Hardware
      • Prerequisites
        Target devices : Virtex-7 VC707 Evaluation Platform (xc7vx485tffg1761-2)
        Tool Version : Xilinx Vivado 2015.4 or later tools
        If you are using Kintex-7 KC705 Evaluation Platform, you need to change the SiTCP module in the firmware to XC7KSiTCPlib32k.

Line: 34 to 34
 
      • source : trunk/multi_chip_FEI4/Software_SEABAS2
      • SiTCP IP Address : Default (192.168.10.16)

    • How to config FEI4
Changed:
<
<
      • For example, execute on your terminal run 1 0111 which is a command to do "Digital Injection and mask chip_1 to chip3."
        Please refer to SEABAS2 DAQ Usages.

>
>
      • For example, execute on your terminal run 1 0111 which is a command to do "Digital Injection and mask chip_1 to chip3."
        Please refer to SEABAS2 DAQ Usages.

 
  1. Release

Changed:
<
<
  1. Notes

    • When you use the original conversion board, you need to change the pin assignment to comply with your board.
      (Default firmware is build for a setup of Osaka Univ.)
    • Already-known warnings
      • Redundant IBUF can be ignored. "Could not create 'IBUF_LOW_PWR' constraint because ..." and "Removing redundant IBUF since ..." can be ignored.
      • Unused registers.
    • Programming VC707 Virtex7 BPI Flash memory
      1. Generate a bitstream (.bit) file in the normal way.
      2. Run this TCL command inside Vivado:
        $ write_cfgmem -format mcs -interface bpix16 -size 128 -loadbit "up 0x0 /path/to/bitfile.bit" -file mynewmcs.mcs
      3. Open Vivado Lab Edition
      4. Open Hardware Manager, open target board
      5. Tools > Add Configuration Memory Device
      6. Select this part:
        Name: mt28gu01gaax1e-bpi-x16
        Part: mt28gu01gaax1e
        Manufacturer: Micron
        Alias: 28f00ag18f
        Family: g18
        Type: bpi
        Density: 1024
        Width: x16
      7. Click OK to "Do you want to program the configuration memory device now?"
      8. Add your .mcs file to the Configuration File field
      9. Hit OK
      10. Right click on device >> Boot from Configuration Memory Device
      11. Change the VC707 FPGA Board Configuration Mode JTAG to Master BPI. Set SW13 DIP switch M[2:0]=010.
>
>
 

YARR

 
This site is powered by the TWiki collaboration platform Powered by PerlCopyright © 2008-2024 by the contributing authors. All material on this collaboration platform is the property of the contributing authors.
Ideas, requests, problems regarding TWiki? Send feedback