Difference: FE65p2ChipDAQ (1 vs. 30)
Revision 302017-12-08 - KojiNakamura
| Line: 1 to 1 | ||||||||
|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | ||||||||
| Line: 111 to 111 | ||||||||
|
KEKFE65-13@-20degC CompVbnDac: 50 PrempVbpDac: 120 VbnLccDac : 200 VffDac : 15 | ||||||||
| Added: | ||||||||
| > > | XpressK7 DAQFE65byXpressK7 | |||||||
ImagesThere are 24 images in this page | ||||||||
Revision 292017-10-17 - AtlasjSilicon
Revision 282017-07-05 - JunkiSuzuki
| Line: 1 to 1 | ||||||||
|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | ||||||||
| Line: 101 to 101 | ||||||||
https://eutelescope.web.cern.ch/forum/multiple-dut-events-tlu-trigger | ||||||||
| Changed: | ||||||||
| < < | instructions on eudaq ->
http://yarr.readthedocs.io/en/latest/eudaq.html | |||||||
| > > | instructions on eudaq -> http://yarr.readthedocs.io/en/latest/eudaq.html
Exttrigger modeSeabas firmware :MPPC bias : ~60V Latency : 70 ///// memo KEKFE65-13@-20degC CompVbnDac: 50 PrempVbpDac: 120 VbnLccDac : 200 VffDac : 15 | |||||||
ImagesThere are 24 images in this page | ||||||||
Revision 272017-06-17 - JunkiSuzuki
| Line: 1 to 1 | |||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | |||||||||||||||||||
| Line: 33 to 33 | |||||||||||||||||||
| |||||||||||||||||||
| Changed: | |||||||||||||||||||
| < < |
| ||||||||||||||||||
| > > |
| ||||||||||||||||||
| |||||||||||||||||||
Revision 262017-06-17 - JunkiSuzuki
| Line: 1 to 1 | |||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | |||||||||||||||||||||||||||||||
| Line: 28 to 28 | |||||||||||||||||||||||||||||||
| |||||||||||||||||||||||||||||||
| Changed: | |||||||||||||||||||||||||||||||
| < < |
| ||||||||||||||||||||||||||||||
| > > |
| ||||||||||||||||||||||||||||||
| |||||||||||||||||||||||||||||||
| Changed: | |||||||||||||||||||||||||||||||
| < < |
| ||||||||||||||||||||||||||||||
| > > |
| ||||||||||||||||||||||||||||||
DAQ development by SPEC | |||||||||||||||||||||||||||||||
Revision 252017-06-16 - JunkiSuzuki
| Line: 1 to 1 | |||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | |||||||||||||||||||||||||||||||
| Line: 27 to 27 | |||||||||||||||||||||||||||||||
| |||||||||||||||||||||||||||||||
| Changed: | |||||||||||||||||||||||||||||||
| < < |
| ||||||||||||||||||||||||||||||
| > > |
| ||||||||||||||||||||||||||||||
| |||||||||||||||||||||||||||||||
| Added: | |||||||||||||||||||||||||||||||
| > > |
| ||||||||||||||||||||||||||||||
DAQ development by SPEC
| |||||||||||||||||||||||||||||||
Revision 242017-02-22 - AtlasjSilicon
| Line: 1 to 1 | |||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | |||||||||||||||||||
| Line: 29 to 29 | |||||||||||||||||||
| |||||||||||||||||||
| Changed: | |||||||||||||||||||
| < < |
| ||||||||||||||||||
| > > |
| ||||||||||||||||||
DAQ development by SPEC
| |||||||||||||||||||
| Line: 95 to 95 | |||||||||||||||||||
|
https://eutelescope.web.cern.ch/forum/multiple-dut-events-tlu-trigger | |||||||||||||||||||
| Added: | |||||||||||||||||||
| > > |
instructions on eudaq ->
http://yarr.readthedocs.io/en/latest/eudaq.html | ||||||||||||||||||
ImagesThere are 24 images in this page | |||||||||||||||||||
Revision 232017-02-17 - AtlasjSilicon
| Line: 1 to 1 | |||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | |||||||||||||||||||
| Line: 29 to 29 | |||||||||||||||||||
| |||||||||||||||||||
| Changed: | |||||||||||||||||||
| < < |
| ||||||||||||||||||
| > > |
| ||||||||||||||||||
DAQ development by SPEC
| |||||||||||||||||||
Revision 222017-02-17 - AtlasjSilicon
| Line: 1 to 1 | |||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | |||||||||||||||||||
| Line: 29 to 29 | |||||||||||||||||||
| |||||||||||||||||||
| Changed: | |||||||||||||||||||
| < < | |||||||||||||||||||
| > > |
| ||||||||||||||||||
DAQ development by SPEC
| |||||||||||||||||||
Revision 212017-02-04 - JunkiSuzuki
| Line: 1 to 1 | ||||||||
|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | ||||||||
| Line: 14 to 14 | ||||||||
| Timon's talk in AUW April 2016
Timon's Twiki | ||||||||
| Added: | ||||||||
| > > | FE65-P2.pdf | |||||||
Chips and Bump Bonding at SLACsensor name,bias(type), condition, patch work, dose, | ||||||||
| Line: 124 to 126 | ||||||||
| ||||||||
| Added: | ||||||||
| > > |
| |||||||
Revision 202017-02-03 - JunkiSuzuki
| Line: 1 to 1 | |||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | |||||||||||||||||||
| Line: 25 to 25 | |||||||||||||||||||
| |||||||||||||||||||
| Changed: | |||||||||||||||||||
| < < |
| ||||||||||||||||||
| > > |
| ||||||||||||||||||
DAQ development by SPEC | |||||||||||||||||||
Revision 192017-02-03 - JunkiSuzuki
| Line: 1 to 1 | |||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | |||||||||||||||||||
| Line: 25 to 25 | |||||||||||||||||||
| |||||||||||||||||||
| Changed: | |||||||||||||||||||
| < < |
| ||||||||||||||||||
| > > |
| ||||||||||||||||||
DAQ development by SPEC | |||||||||||||||||||
Revision 182016-10-26 - KojiNakamura
| Line: 1 to 1 | ||||||||
|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | ||||||||
| Line: 71 to 71 | ||||||||
HitOr self trigger scan1. Run digital scan2. Run analog scan 3. Prepare config: - Enable all pixels: # bin/config_fe65-p2 fe65p2.json (Overwrites config file) - Apply digital scan mask: # bin/applyMask fe65p2_ch0_digitalscan_EnMask.dat fe65p2.json - Copy masked config: # cp masked_fe65p2.json fe65p2.json - Apply analog scan mask: # bin/applyMask fe65p2_ch0_analogscan_EnMask.dat fe65p2.json - Copy masked config: # cp masked_fe65p2.json fe65p2.json 4. Run noise scan (~5min) 5. Apply noise mask: - Apply digital scan mask: # bin/applyMask fe65p2_ch0_noisescan_NoiseMask.dat fe65p2.json - Copy masked config: # cp masked_fe65p2.json fe65p2.json 6. Mask stuck/noise hitter pixels: - #bin/fixHitbus fe65p2.json (takes quite some time ~15min) - Only pixels which will get masked get printed to stdout, optimally these should not be many - If many pixels appear to not work something is wrong - You can observe the process by probing HitOr Output and Trigger, there should be two hitOr pulses per trigger - The program produces a mask hitbus_enMask.png - Copy masked config: # cp masked_fe65p2.json fe65p2.json 7. Run exttrigger scan: - If everything went right you should observe a trigger rate of a few Hz without a particle source - With source the rate should be much higher - The internal dead time is 200bc (currently hardcoded for testing) | ||||||||
| Added: | ||||||||
| > > | YARR DAQ in EUDAQHi Koji, See here for instructions on eudaq: http://yarr.readthedocs.io/en/eudaq/eudaq.html Swap into branch “eudaq”. Don’t forget to program the correct firmware (assuming you already have the adapter board). Some remarks: - I had a merge conflict problem in the firmware and I’m not 100% that is resolvers properly. If it is not right, YARR would not answer to triggers, which you should see if the RC does not see more trigger. - I had to change the way events get send to the RC, this is untested and I hope it works. - There is a version of the converter, but I’m sure there were local changes and I can’t get onto the eudaq machine at SLAC due to some stupid permissions. We need to wait until someone sends me the file. If you give me a not to random time window in your night where I can test some things with, we could do that. I have to run some errants and will not be at my laptop the whole time. Otherwise we can get everything running once I’m there in person. Cheers, Timonhttps://eutelescope.web.cern.ch/forum/multiple-dut-events-tlu-trigger | |||||||
ImagesThere are 24 images in this page | ||||||||
Revision 172016-10-20 - JunkiSuzuki
| Line: 1 to 1 | ||||||||
|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | ||||||||
Revision 162016-10-19 - JunkiSuzuki
| Line: 1 to 1 | |||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | |||||||||||||||||||||||||||||||||||||||||||||||||
| Line: 76 to 76 | |||||||||||||||||||||||||||||||||||||||||||||||||
 Koji Nakamura - 2016-04-21 | |||||||||||||||||||||||||||||||||||||||||||||||||
| Added: | |||||||||||||||||||||||||||||||||||||||||||||||||
| > > | Log noteAfterIrrad20161018 | ||||||||||||||||||||||||||||||||||||||||||||||||
| |||||||||||||||||||||||||||||||||||||||||||||||||
Revision 152016-10-18 - JunkiSuzuki
| Line: 1 to 1 | ||||||||
|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | ||||||||
| Line: 56 to 56 | ||||||||
How to configure chips and run scantuning
| ||||||||
| Changed: | ||||||||
| < < |
| |||||||
| > > |
| |||||||
| ||||||||
Revision 142016-10-13 - AtlasjSilicon
| Line: 1 to 1 | ||||||||
|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | ||||||||
| Line: 47 to 47 | ||||||||
| sudo depmod cd ../ ; make | ||||||||
| Changed: | ||||||||
| < < |
| |||||||
| > > |
| |||||||
sudo modprobe specDriver bin/programFpga ../hdl/syn/yarr_fe65p2_revB.bit bin/test | ||||||||
Revision 132016-10-07 - AtlasjSilicon
| Line: 1 to 1 | |||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | |||||||||||||||||||
| Line: 24 to 24 | |||||||||||||||||||
| |||||||||||||||||||
| Changed: | |||||||||||||||||||
| < < |
| ||||||||||||||||||
| > > |
| ||||||||||||||||||
DAQ development by SPEC | |||||||||||||||||||
Revision 122016-10-06 - AtlasjSilicon
| Line: 1 to 1 | |||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | |||||||||||||||||||||||||
| Line: 23 to 23 | |||||||||||||||||||||||||
| |||||||||||||||||||||||||
| Changed: | |||||||||||||||||||||||||
| < < |
| ||||||||||||||||||||||||
| > > |
| ||||||||||||||||||||||||
DAQ development by SPEC
| |||||||||||||||||||||||||
| Line: 57 to 57 | |||||||||||||||||||||||||
How to configure chips and run scantuning
| |||||||||||||||||||||||||
| Added: | |||||||||||||||||||||||||
| > > |
| ||||||||||||||||||||||||
| |||||||||||||||||||||||||
Revision 112016-10-06 - JunkiSuzuki
| Line: 1 to 1 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Line: 16 to 16 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Timon's Twiki
Chips and Bump Bonding at SLAC | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Changed: | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| < < | KEKFE1 KEKFE2 KEKFE3 KEKFE4 KEKFE5 KEKFE6 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| > > | sensor name,bias(type), condition, patch work, dose,
| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
DAQ development by SPEC
| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Revision 102016-10-03 - JunkiSuzuki
| Line: 1 to 1 | ||||||||
|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | ||||||||
| Changed: | ||||||||
| < < | ||||||||
| > > | ||||||||
IntroductionFE65-P2 is the readout ASIC with 65nm processing as pre-pre-production for the RD53A/B chips used by HL-LHC ITK pixel upgrade. | ||||||||
| Line: 54 to 54 | ||||||||
bin/benchmarkDma
How to configure chips and run scan | ||||||||
| Added: | ||||||||
| > > | tuning
| |||||||
General scan consolHitOr self trigger scan | ||||||||
| Line: 61 to 71 | ||||||||
| 1. Run digital scan 2. Run analog scan 3. Prepare config: - Enable all pixels: # bin/config_fe65-p2 fe65p2.json (Overwrites config file) - Apply digital scan mask: # bin/applyMask fe65p2_ch0_digitalscan_EnMask.dat fe65p2.json - Copy masked config: # cp masked_fe65p2.json fe65p2.json - Apply analog scan mask: # bin/applyMask fe65p2_ch0_analogscan_EnMask.dat fe65p2.json - Copy masked config: # cp masked_fe65p2.json fe65p2.json 4. Run noise scan (~5min) 5. Apply noise mask: - Apply digital scan mask: # bin/applyMask fe65p2_ch0_noisescan_NoiseMask.dat fe65p2.json - Copy masked config: # cp masked_fe65p2.json fe65p2.json 6. Mask stuck/noise hitter pixels: - #bin/fixHitbus fe65p2.json (takes quite some time ~15min) - Only pixels which will get masked get printed to stdout, optimally these should not be many - If many pixels appear to not work something is wrong - You can observe the process by probing HitOr Output and Trigger, there should be two hitOr pulses per trigger - The program produces a mask hitbus_enMask.png - Copy masked config: # cp masked_fe65p2.json fe65p2.json 7. Run exttrigger scan: - If everything went right you should observe a trigger rate of a few Hz without a particle source - With source the rate should be much higher - The internal dead time is 200bc (currently hardcoded for testing) Images | ||||||||
| Changed: | ||||||||
| < < | There are 24 images in this page | |||||||
| > > | There are 24 images in this page | |||||||
|
-- Koji Nakamura - 2016-04-21 | ||||||||
Revision 92016-08-23 - KojiNakamura
| Line: 1 to 1 | ||||||||
|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chipIntroduction | ||||||||
| Changed: | ||||||||
| < < | FE65-P2 is the readout ASIC with 65nm processing as pre-pre-production for the RD53A /B chips used by HL-LHC ITK pixel upgrade. | |||||||
| > > | FE65-P2 is the readout ASIC with 65nm processing as pre-pre-production for the RD53A/B chips used by HL-LHC ITK pixel upgrade. | |||||||
| more information is available in : | ||||||||
| Line: 14 to 14 | ||||||||
| Timon's talk in AUW April 2016
Timon's Twiki | ||||||||
| Changed: | ||||||||
| < < | Bump Bonding at SLAC | |||||||
| > > | Chips and Bump Bonding at SLACKEKFE1 KEKFE2 KEKFE3 KEKFE4 KEKFE5 KEKFE6 | |||||||
DAQ development by SPEC
| ||||||||
| Changed: | ||||||||
| < < | How to setup SPEC board | |||||||
| > > | How to setup SPEC board | |||||||
| ||||||||
| Line: 41 to 53 | ||||||||
| bin/benchmarkDma | ||||||||
| Added: | ||||||||
| > > | How to configure chips and run scanGeneral scan consolHitOr self trigger scan1. Run digital scan2. Run analog scan 3. Prepare config: - Enable all pixels: # bin/config_fe65-p2 fe65p2.json (Overwrites config file) - Apply digital scan mask: # bin/applyMask fe65p2_ch0_digitalscan_EnMask.dat fe65p2.json - Copy masked config: # cp masked_fe65p2.json fe65p2.json - Apply analog scan mask: # bin/applyMask fe65p2_ch0_analogscan_EnMask.dat fe65p2.json - Copy masked config: # cp masked_fe65p2.json fe65p2.json 4. Run noise scan (~5min) 5. Apply noise mask: - Apply digital scan mask: # bin/applyMask fe65p2_ch0_noisescan_NoiseMask.dat fe65p2.json - Copy masked config: # cp masked_fe65p2.json fe65p2.json 6. Mask stuck/noise hitter pixels: - #bin/fixHitbus fe65p2.json (takes quite some time ~15min) - Only pixels which will get masked get printed to stdout, optimally these should not be many - If many pixels appear to not work something is wrong - You can observe the process by probing HitOr Output and Trigger, there should be two hitOr pulses per trigger - The program produces a mask hitbus_enMask.png - Copy masked config: # cp masked_fe65p2.json fe65p2.json 7. Run exttrigger scan: - If everything went right you should observe a trigger rate of a few Hz without a particle source - With source the rate should be much higher - The internal dead time is 200bc (currently hardcoded for testing) | |||||||
ImagesThere are 24 images in this page | ||||||||
Revision 82016-06-27 - KojiNakamura
| Line: 1 to 1 | |||||||||
|---|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | |||||||||
| Line: 67 to 67 | |||||||||
| |||||||||
| Added: | |||||||||
| > > |
| ||||||||
Revision 72016-06-25 - KojiNakamura
| Line: 1 to 1 | |||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | |||||||||||||||||||||||||||||||||||||||||||||||||
| Line: 18 to 18 | |||||||||||||||||||||||||||||||||||||||||||||||||
DAQ development by SPEC
| |||||||||||||||||||||||||||||||||||||||||||||||||
| Added: | |||||||||||||||||||||||||||||||||||||||||||||||||
| > > | How to setup SPEC board
mkdir -p /home/atlasj/work/SPEC/YARR cd /home/atlasj/work/SPEC/YARR/ git clone https://github.com/Yarr/Yarr.git git fetch git checkout fe65_p2 cd /home/atlasj/work/SPEC/YARR/Yarr/src/kernel make sudo make install sudo depmod cd ../ ; make
sudo modprobe specDriver bin/programFpga ../hdl/syn/yarr_fe65p2_revB.bit bin/test | ||||||||||||||||||||||||||||||||||||||||||||||||
| Added: | |||||||||||||||||||||||||||||||||||||||||||||||||
| > > | bin/benchmarkDma | ||||||||||||||||||||||||||||||||||||||||||||||||
Images | |||||||||||||||||||||||||||||||||||||||||||||||||
| Changed: | |||||||||||||||||||||||||||||||||||||||||||||||||
| < < |
| ||||||||||||||||||||||||||||||||||||||||||||||||
| > > | There are 24 images in this page | ||||||||||||||||||||||||||||||||||||||||||||||||
|
-- Koji Nakamura - 2016-04-21 | |||||||||||||||||||||||||||||||||||||||||||||||||
Revision 62016-06-05 - KojiNakamura
| Line: 1 to 1 | ||||||||
|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | ||||||||
Revision 52016-06-03 - KojiNakamura
| Line: 1 to 1 | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | |||||||||||
| Line: 39 to 39 | |||||||||||
| |||||||||||
| Added: | |||||||||||
| > > |
| ||||||||||
Revision 42016-05-25 - KojiNakamura
| Line: 1 to 1 | ||||||||
|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | ||||||||
| Line: 37 to 37 | ||||||||
| ||||||||
| Added: | ||||||||
| > > |
| |||||||
Revision 32016-05-24 - KojiNakamura
| Line: 1 to 1 | |||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | |||||||||||||||||||||||||||||||||||||||||||||||||
| Line: 19 to 19 | |||||||||||||||||||||||||||||||||||||||||||||||||
| |||||||||||||||||||||||||||||||||||||||||||||||||
| Added: | |||||||||||||||||||||||||||||||||||||||||||||||||
| > > | Images
| ||||||||||||||||||||||||||||||||||||||||||||||||
| -- Koji Nakamura - 2016-04-21
\ No newline at end of file | |||||||||||||||||||||||||||||||||||||||||||||||||
| Added: | |||||||||||||||||||||||||||||||||||||||||||||||||
| > > |
| ||||||||||||||||||||||||||||||||||||||||||||||||
Revision 22016-05-19 - KojiNakamura
| Line: 1 to 1 | ||||||||
|---|---|---|---|---|---|---|---|---|
DAQ development for FE65-P2 chip | ||||||||
| Line: 17 to 17 | ||||||||
Bump Bonding at SLACDAQ development by SPEC
| ||||||||
| Changed: | ||||||||
| < < | | |||||||
| > > |
| |||||||
|
-- Koji Nakamura - 2016-04-21 | ||||||||
Revision 12016-04-21 - KojiNakamura
| Line: 1 to 1 | ||||||||
|---|---|---|---|---|---|---|---|---|
| Added: | ||||||||
| > > |
DAQ development for FE65-P2 chipIntroductionFE65-P2 is the readout ASIC with 65nm processing as pre-pre-production for the RD53A /B chips used by HL-LHC ITK pixel upgrade. more information is available in : motivation talk in AUW April 2016
Timon's talk in AUW April 2016
Timon's Twiki
Bump Bonding at SLACDAQ development by SPEC
Koji Nakamura - 2016-04-21 | |||||||
View topic | History: r30 < r29 < r28 < r27 | More topic actions...
Copyright © 2008-2024 by the contributing authors. All material on this collaboration platform is the property of the contributing authors. Ideas, requests, problems regarding TWiki? Send feedback