Feb 2020 Testbeam Log

Article text.

-- Atlasj Silicon - 2019-12-26

備忘録

Tool関係

LGAD Amp3 - DRS4までのcableの長さはちょうどいいが,LGAD - DRS4 (degitaizer family V1742)で繋ぐ場合は短い.もう少し長いのを準備するか,extendのものを準備するべき(嘘.ありました)

AC power tapは全く使わなかった.

GPIBケーブル全く使わなかった

HVは全く使わなかった.(一応テストするために使った)

HV protection boardもう1枚あるといいかもしれない.

patch pannel 修理(4pinMOLEX->C3_2, banana ver.->C0_1?, C3_all

patch pannelがもう1つあってうまくいけばTEXIOいらなくなる可能性がある → 嘘.めちゃくちゃ必要

cooling boxのcableが出るところを改善(LGADのcableが多すぎる...)ケーブル細いものを使いたい.

ねじは袋に入れて分けるべき.ToolBoxのでは運搬中に無慈悲にごちゃ混ぜになる.

clip-clip, clip-bananaは割と使えるので必よ. もう4本くらいあれば楽

cableの取り回しや,leco frameをアップデート

Test関係

KEK142,KEK144のchip1は熱でanalog dataがほとんど返ってこない場合がある.ファンで冷却を行った.

NIMoutは,Seabas on boardのNIMout0,1は不安定なので,Seabas Adapter BoardのNIMout2,3,4を使うべき.

LGAD DAQへのcablingは,stripのchannelとpadのchannelで分けるべき.

patch pannelからTelescopeにLVを供給するとき,GNDがHSIO2と同じになるようにする方法を模索する(今回はclip-clipでどうにか凌いだ)

下流側のTelescopeで,横向きにするTelescopeから出るcableがパッチパネルと抵触するので,そこを改善する.

L字LEMO Connector必要(FNALにおいてあるけど)

raspiとのcommunicationで,時間がたつと,"ssh_exchange_identification: Connection closed by remote host"という文とともにssh接続できなくなる.power tapによるrebootで改善.

DRS4のはよく止まりがちなので,rebootする必要が多々あるので,ラズパイ同様power tapでできるようにする.

HVのケーブル長いのしか置いてない.cablingがぐちゃぐちゃになってしまう.

全体のcablingをきれいにまとめたい

Information for testbeam2020

IP address

  • 192.168.7.110: atlaspc9 at control room
  • 192.168.7.111: atlaspc14 DAQ PC at beam line
  • 192.168.7.112: Lenovo Laptop PC at beam line for XpressK7 Firmware
  • 192.168.7.113: Laptop PC at control room
  • 192.168.7.114: Nakamura-san's PC
  • 192.168.7.115: Hara-sensei's PC
  • 192.168.7.116: katsuya's PC
  • 192.168.7. 32: raspberrypi for thermo control
  • 192.168.7.121: iseg
  • 192.168.133.51: VME machine (user: daq)
  • 131.225.176.86: power tap
  • 192.168.1.10: rce0: HSIO2; 192.168.1.22: USB ether atlaspc14
  • 192.168.10.16: SeabasTLU; 192.168.10.50: USB ether atlaspc14

iseg HV 2kV

  • ch0: LGAD pad
  • ch1: LGAD strip
iseg HV 500V
  • ch0: FEI4 x7
  • ch1: RD53A V4S02
  • ch2: RD53A Quad2
  • ch3: nothing
  • ch4: MPPC x4 (-55V -> -0.001mA)
iseg LV -> patch pannel
  • ch0: 6V (650mA)
    • C0_0: LGAD strip amp
    • C0_2: LGAD pad amp
  • ch1: 1.8V (measure 2.3V) (2130mA)
    • C1_2: Telescope
  • ch2: 1.8V (measure 2.3V) (4350mA)
    • C2_1: Telescope
    • C2_2: Telescope
  • ch3: 1.8V (1440mA)
  • ch4: 1.2V (370mA)
    • C0_2: VDDD of KEK112 (quad chip)
  • ch5: 1.5V (960mA)
    • C1_0: VDDA of KEK112
  • ch6: 3.3V (2100mA)
    • C2_0: Seabas power
  • * C3_2 of 4pinMOLEX Patch pannel and C3_n of banana patch pannel are broken.
  • connectivity of Seabas adapter - Yarr (RJ45 - DisplayPort)
    • Trigger (TLU-->Yarr) : "TRIGGER" (n and p)
    • Busy (Yarr-->TLU) : "BUSY" (n and p)
power tap (remote control)
  • ch1: HSIO2 power
  • ch2: VME (LGAD DAQ system. sometimes stacks data.
  • ch4: raspberrypi (sometimes cannot ssh connection.
  • selection of turn off channel -> the control PC (throgh ethernet cable) (cannot work by our PC) user:admin pw:ftbf2460
beam info.
  • 2/27 16:00: supercycle? 60s, about 4s, 80k~90k? events per spill.
TEXIO Low Voltage Power Supply
  • PW8-5ADPS (upper)
    • 8V/5A: fan in cooling box -->8V
  • PW18-1.8AQ (middle)
    • (-6V/1A, +8V/2A): MPPC, Leval Shifter, and TLU adapter board --> (-5V/-0.35A),(+5V/+0.44A)
    • (+18V/1.8A): LGAD amp3 --> (12V/0.26A)
  • ??R36-3A (bottom)
    • (36V/3A): fan cooling copper peltier --> (12V/3A)
Low Voltage Power Supply for Peltier
  • TAKASAGO ZX-S-400LN -> Copper Peltier -> 30V/3A
  • ???? -> bottom peltier -> 9V/2A
  • ???? -> upper peltier -> 3.3V/1A
SeabasTLU
  • Hardware
    • 3.3V / 2A
    • unstable communication (sometimes this occurs when current decrease down to 1.5A.)
    • --> 3.5V / 2.06A stable communication.
    • --> --> 3.8V / 2.9A to make (CMOS) signal level 3.3V. LVDS for Yarr need 3.3V to work.
  • cabling connection
    • RJ45_0 -- XpressK7 portD
    • CMOSin0 -- HSIO2 LEMO4 (J24)
    • CMOSout0 -- picoscope chA
    • CMOSout1 -- picoscope chB
    • CMOSout2 -- picoscope chC
    • CMOSout3 -- picoscope chD
    • CMOSout8 -- HSIO2 LEMO1 (J21)
    • NIMin6 -- DRS4 TRG OUT
    • NIMin7 -- ROI (KEK112 HitOr via level shifter)
    • NIMout2 -- DRS4 TR0 for LGAD strip trigger
    • NIMout3 -- DRS4 TR1 for LGAD pad trigger
    • MPPCctrl{1,2,3,4} -- MPPC{1,2,3,4}
  • Firmware
    • Busy interval: 1ms or 3ms (GBusyWidth)
      • because of RD53 vs. KEK112 Correlation Lost and DRS4 stacks.
    • trigger
      • coincidence of 4 MPPC
      • 4MPPC and ROI (HitOr signal). for

Telescope info.

  • (upstream) KEK142, 144, 112, (V4S02, Quad, LGAD,) 134, 141, 132, 133 (downstream)
  • config file:
  • Latency: 232 (lv1 peak is 3-4 bc)
RD53A info./XpressK7/Yarr
  • bring Quad, V4S02, KEK53-12?(direct mode only)
  • XpressK7 (Ohio card) -- RD53A connection
    • portA -- Quad
    • portC -- V4S02
    • portD -- Seabas via Displayport to RJ45
  • Yarr OLD software (~2020/2/28)
    • Yarr software: Yarr-20200117
    • Yarr firmware: YARR-FW-20180921
    • scan: ./bin/scanConsole -r configs/controller/specCfgFnal.json -c configs/connectivity/FNALtest_setup.json -s configs/scans/rd53a/std_xxxscan.json -p
    • Quad config file = "FNALtest_Quad.json"
    • V4S02 config file = "FNALtest_V4S02.json"
    • tunig: ./scripts/tune-rd53a.sh 2000 1500 10000 7 configs/controller/specCfgFnal.json configs/connectivity/FNALtest_setup.json
      • V4S02 -> data/002775_digital ~ 002790_totscan -> configs/FNALtest_V4S02.json.scrptTUNE
      • Quad -> data/0091_digital ~ 002806_totscan -> configs/FNALtest_Quad.json.scrptTUNE
  • Yarr NEW Firmware
    • YARR-FW: YARR-FW-20180921
    • OLD version --> /PATH TO YARR-FW/syn/2020_02_21_rd53a_325_3x4_160Mbps_tb.bit
    • fix version --> /PATH TO YARR-FW/syn/2020_02_29_rd53a_325_3x4_160Mbps_tb.bit
      • able to handle 2 modules at same run.
      • work trigger/busy system
    • fix-fix version --> /PATH TO YARR-FW/syn/2020_03_05_rd53a_325_3x4_160Mbps_tb.bit
      • able to handle Nakamura-san board and trigger/busy signal via the board.
  • Yarr NEW Software
    • Yarr-20200227
    • cannot use config files used by before software
    • debug
      • configs/controller/specCfgFnal.json
        • spiConfig : 524288 --> 541200 --> 524288
        • disable auto-zeroing : "autoZero" : { "word" : 0, "interval" : 100 }
        • "config" in TrigConfig : 65534
      • configs/scan/rd53/fnal_extrigger.json
        • remove algorithm "TotMap","Tot2Map","L1Dist","hitsPerEvent" not for memory leak.
        • add '"triggerMultiplier": 32 ,' in "loops"
    • analysisRawData.cpp needed to be adapt to take 32BC data tag. --> see fnal_tb_feb_2020 branch in yarr repo.
    • Run
      • ./bin/scanConsole -r configs/controller/specCfgFnal.json -c configs/connectivity/FNAL_setup.json -s configs/scans/rd53a/fnal_extrigger.json -n 1
  • Ohio Card (there are some ohio cards whome patterns are different. you should CHECK)
    • portA (this pattern is able to be used for communication with module)
      • {C6,C7},{C9,10},{C12,C13} = capacitor
      • {C15,C16} = resistor for trigger handling (trigger freq << data freq)
      • {C3,C4} = capacitor
      • {R11,R12} = Nothing
    • portB,C are similar to portA
    • portD (for trigger / busy)
      • {C57,C58},{C60,C61},{C63,64} = resistor (trigger handling, which is low frequency)
      • {C66,C67} = capacitor
      • {C54,C55} = resistor
      • {C99,C107} = resistor
Module Positions
  • KEK142 19.5cm
  • KEK144 25cm
  • KEK112 29cm
  • RD53-V4S04 32cm (portC)
  • RD53-Quad 40.5cm (portA)
  • LGAD strip (50-62cm)
  • LGAD pad (50-62cm)
  • KEK134 73.5cm
  • KEK141 86cm
  • KEK132 99cm
  • KEK133 106.5cm
software running
  • ~/work/FNALtestbeam/home/USER/
  • source /opt/rh/devtool-set7/enable
  • copy software at this path
  • cd configs
  • ./configure.sh
  • check setup_local.sh
  • source setup_local.sh
  • make clean ; make
  • cd ..
  • make distclean; make
  • onlineMonitor/src/config.txt automatically last run set
  • cd Onlin/src/
  • make
  • ./mkconfig.sh
  • ../binn/onlinemonitor config.txt
  • aa
  • offlineAnalusis/src/ mkconfig.sh copy to this directory from onlineMonitor
  • make
  • config,txt cohy to
HSIO2
  • ROI
    • mkmask.sh is script for ROI.
    • /PATH FNALtestbeam/HSIO2/DATE/mkmask
    • select region and edit mincol, maxcol, minrow, maxrow
    • $ cp tempfile rceconf/masks/hitbus_KEK112_RJx_primlist_4local_fe0_xxxx.dat
    • edit Seabas firmware: add ROI HitOr to trigger. (TLU_top_1msROI.bit)
    • * if include ROI, Yarr latency should be changed. it is better to be plus 15 to latency (230-->245) in configs/scans/rd53a/fnal_exttrigger.json
    • * ROI did not work well... We dont know...
Run
  • SeabasTLU
    • $ cd /home/atlasj/work/FNALtestbeam/SeabasTLU/SoftwareSeabasTLU-FNAL/SoftwareSeabasTLU-trunk/bin
    • $ ./startrun >& /dev/null & sleep 1 ; FILENAME=`ls ../log/rawData_tlu_run0000*| tail -1` ; head -10 $FILENAME ; tail -f ${FILENAME]
    • $ ./stoprun
  • XpressK7
    • $ cd /home/atlasj/work/FNALtestbeam/XpressK7/Yarr-20200227
    • $ ./bin/spenBenchmarkDma (communication check with XpressK7)
    • $ ./bin/scanConsole -
LGAD
  • DRS4/DRS4converter -> ./converter.sh (raw data->root file)
  • latency scan:

Log

Mar10,2020

7:20

  • accese beamline
  • LGAD pad signal -> picoscope
7:50
  • Quad:-100V
  • ROI: RD53A _full version
  • YArr Latency 245-->250
8:20
  • before this time, maybe ROI did not work. in firmware we didnot apply coincidence of scinti and ROI.
  • ROI area
    • # of ROI signal against LGAD signal (ROI/LGAD)
    • ROI overall -> 16/20, 8/12
    • only RJ1 (mainly use) on ROI -> 0?
    • only RJ4 (same col, lower row) on ROI -> 0??

9:11

  • hitbus of ROI setting is reflected when run (NOT when do analogscan. you shuld do run-cosmicGui. anyway, edit hitbus file->close cosmicGui->open calibGui->scan analog->close calibGui->opencosmicGui-> start run--> applied setting)
  • before data maybe ROI setting did not been reflected.
9:15
  • ROI region (average ROI pixel size=(250,50)
    • Col:0-80, Row:336-672 (0-336) in RJ1 were enable on hitbus --> see signal of both
    • Col:0-80, Row:456-672 (120-336) in RJ1 were enable on hitbus --> see signal of both
    • Col:0-40, Row:456-672 (120-336) in RJ1 were enable on hitbus --> 1/12
    • Col:40-80, Row:456-672 (120-336) in RJ1 were enable on hitbus --> see signal of both
    • Col:40-60, Row:456-556 (120-220) in RJ1 were enable on hitbus --> see signal of both (5mm*5mm area)
    • Col:40-50, Row:456-506 (120-170) in RJ1 were enable on hitbus --> see signal of both
    • Col:50-60, Row:506-556 (170-220) in RJ1 were enable on hitbus --> see signal of both but offtime
    • final position: Col:40-50, Row:456-506 (120-170) in RJ1 -->run#309 (10:20)
10:30
  • LGADにbeamを当てるために,beam narrowにして,ROIを外して,beam profileを見て,stageを動かす.
  • stage (1817.2, 344.9) -->(1822, 349.8) 動かしすぎた?
  • stage (1817.2, 349.8) --> (1819.5, 349.8)
  • ---->can not see LGAD signal by trigger from ROI and scinti (trigger 15k)
  • -->-->--> we should make ROI more narrow...
11:30
  • ROI region
    • Col:45-50, Row:456-506 (120-170) in RJ1 were enable on hitbus --> half event?
    • Col:40-45, Row:456-506 (120-170) in RJ1 were enable on hitbus --> meore event than above
    • Col:42-47, Row:456-506 (120-170) in RJ1 were enable on hitbus --> it looked good
    • Col:42-47, Row:456-481 (120-145) in RJ1 were enable on hitbus --> 9
    • Col:42-47, Row:481-506 (145-170) in RJ1 were enable on hitbus --> 4
    • Col:42-47, Row:461-486 (125-150) in RJ1 were enable on hitbus --> ?
    • Col:42-47, Row:466-491 (130-155) in RJ1 were enable on hitbus --> best Region Of Interesting
13:00
  • LGAD latency scan
    • (busy 3ms, with ROI,
    • latency 15: positive signal over than 0.2V events are 5 within 28k events (TLU227, LGAD105)
    • latency 30: positive 4 events within 12k (TLU228, LGAS106)
  • なぜか,channel-22,23,24に変更(EventLoopManager)したら信号(positive)が見えた.(DRS4側では,下のchannelの中の,上から5,6,7番目のchを使った)
21:13
  • stage shift (vertical) :344.7mm->349.9mm
  • Quad Lcc off without ROI
  • latency: 250->230
  • busy1ms or 500us.
  • applied noise scan and enmask by analog scan.
  • --> Correlation Lost at 1 spill. this is due to beam rate = beam size?

Mar9,2020

7:30

  • Quad tuning: threshold=1000, but Linea FE tuning was bad. (FNAL_Quad_1000e_7tot_NOTUUSE.json)
8:15
  • Quad tuning: first target threshold:2000, second one:1000, tot:7, target charge:10000 [003795-003810] (FNAL_Quad_1000e_7tot.json)
  • the first run on this condition was #272.
12:00
  • run for 1000e threshold ended.
  • rnu for edge research started. <---
  • Quad config was changed to 1500 threshold.
  • without ROI because it did not work (on selftrigger it worked)
12:35
  • XpressK7 /Yarr/configs/controller/specCfgFnal.json deadtime:300-->1200 for no losting correlation
13:00
  • beam profile cahnged to forcused.
  • and beam position was changed.
  • stage x:1817.4-->1829.0 (Quad edge)
17:00
  • LGAD re-install.
  • it looks good behaivior.
18:00
  • stage x:1829.0-->1817.4 (Quad center position)
  • made beam wider
19:30
  • ROI making
    • hitbus ROI did not work well
    • instead of this, made enmask applied.
    • -->search for LGAD signal...

Mar8,2020

begin summer time.

7:30

  • accese beam line
  • LGAD problem solution
    • strip
      • HV : ~-120V: no current, 120V~: current increased (-200V:80uA@20℃)
      • no signal by using beta-ray checking source
    • pad
      • HV : current was constant 0 at 0~400V
      • cable of LEMO-LGAD had been broken. fixed it.
      • but situation was not changed.
      • no signla by using checking source
    • amp
      • 12V --> too noisy to see signal. (2V heights)
      • 5/6V --> ?
    • --> all LGAD setup moves to control room to research cause of this.

~11:00

  • no beam
11:20 11:30
  • beam. beam profile was changed to narrow.
15:20
  • finished run: Quad [1500e,150V, and overall]
  • to take data for Quad edge, set ROI Row = (164-184) enable.
  • Quad same tuning.

Mar7,2020

7:00

  • wide beam
taking data with various tuning and setted from today.

RD53A Quad Plan: V4S02 -150V
No. HV Threshold Events
1 -50V 1500e 0.5M
2 -150V 1500e 1M
3 -10V 1500e 0.5M
4 -150V 1000e 0.5M
5(Edge) -150V 1500e 0.5M
9:23
  • ROI include.
  • run223
  • --> wrong latency of RD53A
9:26
  • latency of Yarr: 230-->245
  • run224

19:00

  • no beam

Mar6,2020

7:00

  • beam became wider
8:00
  • shift stage by x:+2.6mm and y:-2.1mm for beam to meet at edge and high row (noisy for Quad) area.
  • start run 182
9:20
  • run184: only 1 RD53A (Quad)
12:48
  • add V4S02 module (including 2 modules)
  • run188
12:52
  • remove Quad (only V4S02)
  • run190 (run189 is empty)
12:57
  • both RD53A modules.
  • run191
13:25
  • noise scan to v4s02
  • run 193

Mar5,2020

8:30-9:00

  • can not pass config of KEK133
  • -->maybe this is due to charge up from HV
  • -->"stroke" LVDD, LVDA.
13:30-14:30
  • changed XpressK7 trigger system
    • TLU - XpressK7 via Nakamura-san board on Ohio card(not use DisplayPort -RJ45 adapter)
    • use new firmware.
  • LGAD position changed
    • lower by 15mm.
  • after this, run 167.
19:00
  • changed Yarr firmware to old version(03_02).
  • after this, run 179.

Mar4,2020

14:30

  • can pass config to modules at same time.
  • a bit fix of KEK141
  • measure z position of all modules except for LGAD. (difficult to measure because it is in cooling box)
18:50
  • retune V4S02 [003556_digitalscan ~ 003571_totscan] and noisescan [003572-3579]
  • from run158 same Quad config and new V4S02 config applied mask.

Mar3,2020

debug and analyse

Mar2,2020

debug and analyse

  • lost correlation problem
  • xpressK7 wrong tag : 666

Mar1,2020

15:00-16:00

  • Timon said that firmware dealing with correct DP-RJ45 communication connectivity is "2020_02_21_rd53a_325_3x4_160Mbps_tb.bit".
  • changed firmware. (other words, undo firmware)
  • occured to take data always in spite of beam.
  • Timon said the problem is maybe due to ohio card. ohio card we used in present is uncorret?
16:20
  • VME did not work well. unstable.
  • this reason was why data in VME was full so organized data.
20:00
  • accese beam line.
  • exchanged ohio card.
  • --> took data when trigger cames, but events is so few.
22:00
  • debug Yarr: specCfgFnal.json: config-->65534 from 1
  • busy: 100us
  • TLU99, XpressK73269,HSIO2142,DRS417
  • --> Yarr data taking looks good!

  • busy: 1ms --> TLU100
22:30
  • busy: 400us --> TLU101
23:30
  • accese beam line
  • fix RD53As position: beam sync->diff (x+10mm moved)
  • try to pass config of V4S02
    • exchanged modules with Quad and V4S02, changed LV, connected to XpressK7 with GND, direct mode. no communication with portC modules.
    • when used old firmware and old software --> pass confis to portC
    • asked to Timon...
3:30 4:15
  • TLU107, Xpressk7:3455, HSIO2:151, DRS4:24
5:02
  • shot run: TLU109, Xpressk7:1457, HSIO2:152, DRS4:25

Feb29,2020

CMS groups moved beam position and beam profile and undo

15:00

  • cntrol accese
    • fix LGAD strip-AMP cable connection (change amp side)
    • check HV connection of LGAD (cannot read IV)
16:00
  • TLU65, HSIO2:105,XpressK7,3197,DRS4:10
    • Telescope's HV: -20V --> -50V
    • maybe beam position and beam profiles change (CMS did not undo?)
21:20
  • Timon made new firmware. (old one is uncorrect. trigger signal and busy signal pin are different. when run in no beam time, get data taking)
  • new firmware --> data size is always 0.
21:30
  • couldn't see the trigger of LGAD -> we could see when we restart the power of VME.
23:00??
  • debug could not receive busy signal from Yarr
  • this was due to not sending trigger signal from Seabas to Yarr
  • LVDS IC was broken?
27:00
  • beam line accese
  • check LVDS driver on TLU adapter board
  • applied voltage to LVDS was ~2.4V. (CMOS Level was same voltage)
  • same times, we noticed incorrect DP<->RJ45 pin.
27:40
  • when applied voltage Seabas: 3.5V (2.06A) --> 4.8V (2.93A) at iseg, CMOS level became 3.3V
  • accese beam line
  • voltage at Seabas input was 3.6V. detected trigger signal at "TRIGGER" on DP-RJ45 adapter.
  • asked to Timon that modify Yarr firmware.

Feb28,2020

14:00 get together at control room

15:20 run22, run23

  • run22: KEK133 position search: x=1824.3 (from x=1814.3)
  • run23: KEK133 position search: x=1829.3 (from x=1824.3) -> KEK133 correct position; move by 3 screw holes
15:45
  • can not work Externaltrigger scan
  • modify spiConfig to "541200" from "524288" in configs/controller/specCfgFnal.json. original config can not deal with multi modules.
  • run24: stage position: x=1814.3. sync test: HSIO2 and XpressK7 (only V4S02). -> HSIO2 counts events, but XpressK7 not.
    • ./bin/scanConsole -r configs/controller/specCfgFnal.json -c configs/connectivity/FNAL_setup.json -s configs/scans/rd53a/std_externaltrigger.json
    • -> HSIO2 counts events, but XpressK7 not.
  • run25: same conditions
    • ./bin/scanConsole -r configs/controller/specCfgFnal.json -c configs/connectivity/FNAL_setup.json -s configs/scans/rd53a/fnal_externaltrigger.json
    • -> sama results... (when run fnal_extrigger.json raw data is created)
    • above comments is lie... get data taking but does not display events counts on Yarr display.
  • TLUrun27, Xpress:run2960, HSIO2:run53
  • TLU:28, Xpress:2961, HSIO2:54
    • memory leak
  • debug fnal_extrigger.json
  • TLU29, Xpressk7:2963, HSIO2:55
    • does not memory leak. it looks good.
    • HSIO2 operation mistaked.
16:30~17:05
  • TLU30, XpressK7:2964, HSIO2:57
    • long run
17:15
  • TLU:32, XpressK7:2966, HSIO2: 60
    • debug Yarr
    • use defaults fnal_extrigger.json
    • --> work read_rawData --> dont edit fnal_extrigger.json
17:32
  • TLU:33, Xpress:2968, HSIO2:62
    • run for debug
17:50
  • TLU:34, Xpress:2969, HSIO2:64
    • Yarr latency: 225
    • add trigMultiplier in fnal_externaltrigger.json
  • TLU:35, Xpress:2970, HSIO2:65
    • Yarr latency: 215
    • V4S02 has many noisy pixel at col 250
    • --> noise_scan after this run
18:00
  • noise_scan against V4S02
    • 002972_std_noisescan
    • there are some noise at LIN with biasing.
18:00
  • control accese
    • MPPC4 x:-5mm move
    • KEK133 x:+15mm move
    • try to pass config of RD53A -Quad
      • connct GND of XpressK7 and RD53A modules.
        • can not pass config...
      • when apply 1.85V from iseg, applied voltages of QUAD/V4S02 are 1.70V
      • when apply 1.95V at iseg, applied voltage of these are 1.82V --> apply 1.95V or 2.00V
        • cannot pass config...
      • exchange DisplayPort of V4S02 and QUAD; [V4S02,Quad]=[portA,portC] -->[portC,portA]
        • pass config!!
        • but digital/analog scan results are not clear...
      • edit configs/scans/std_digitalscans.json and analogscans.json
        • "frequency" : 30000 -> 20000
      • use default config files (edit syncFE mask, LCC on in V4S02, name); FNAL_xxx_fix.json
      • do scans when beam off time
      • --> good scan results!!
19:21
  • tune Quad and V4S02 while beam stopping
  • 003047 ~ 003062 (beam starts since 003060_std_tunefinepixelthreshold)
  • Quad -> noLCC (configs/FNAL_QUAD2_noLCC_tuned.json) (LCC off is due to katsuya's misstake....)
  • V4S02 -> onLCC (configs/FNAL_V4S02_onLCC_tuned.json)
19:44
  • tune Quad and V4S02 while beam on
  • 003063 ~
  • Quad -> onLCC (configs/FNAL_QUAD2_onLCC_tuned.json)
  • V4S02 -> noLCC (confis/FNAL_V4S02_noLCC_tuned.json)
19:50
  • we noticed china house is untill 21 o'clock.
20:10
  • TLU:39, XpressK7:3099, HSIO2:78
  • V4S02 (LCCon, noise sccaned) and Telescope (without QUAD2)
  • --> no siganl (there are noise data) in V4S02
  • latency = 215 is not correct?
21:45
  • TLU:40, XpressK7:3040, HSIO2:79
  • latency = 235
  • --> ...?
21:52
  • TLU:41, XpressK7:3041, HSIO2:80
  • latency = 240
  • --> bad lv1 dist
21:58
  • TLU:42, XpressK7:3042, HSIO2:81
  • latency = 230
  • --> bad
22:13
  • TLU:44, XpressK7:3110, HSIO2:83
  • latency = 230
  • new config file, which is applied noise scans.
22:20
  • accese beam line
  • fix positions V4S02
  • HV check --> it looks good
  • noise scan with using checking source
22:50
  • TLU:45, XpressK7:3121, HSIO2:84
  • latency = 230
  • fixed positions of V4S02
  • --> there are signal looks like noise (col 130-240)
24:00
  • Quad module config remake
  • when Trim=22 (defaults), pass config but there are noise at some areas including syncF.E., which is masked.
  • when Trim=19, can not pass
  • when Trim=25, can pass config. the noise is disappeard.
  • run fnal_extrigger scan. --> appear signal col 130-240.
  • this pattern signal is due to encoding problem? (maybe not to modules)
25:40
  • Telescope
??:??
  • fix positions of RD53As and Telescopes.
26:30
  • dead time = 3ms for synchronous work
  • TLU63, HSIO2:101, LGAD:8
    • first run added LGAD (strip) (apply HV)
    • LGAD strip HV: 330V/90uA (conncting protection board)
    • MISSTAKE: not apply 6V to LGAD amp.
  • TLU64, HSIO2:102, LGAD:9
    • ch0 of patch pannel 650mA
    • LGAD strip gets signal data

Feb27,2020

15:00 beam on

system integration, alignment sensors using Online monitor

21:40 stage goes down by 10mm


beam on time -> test

MPPC trigger test from beam

  • Seabas Firmware -> LVCMOSout[0,1,2,3] = dout[0,1,2,3]
  • apply HV:-55V, LV:+/-5V
  • check picoscope
    • MPPC0: noisy, often send trigger signal not releated beam
    • MPPC1,2,3: looks good.
  • efficiency -> uncomment in Seabas Firmware
    • Dbug(1'b1) in TLU_top
    • "4MPPC Scintilator Triggers" in TLU triggerMaker
    • i dont know more info....
  • alignment
    • apply -55V as HV
    • MPPC{1,2,3,4} eff. = {95%, 100%, 95%, 30%}
    • MPPC4 whom global(x,y)=(2cm,3cm) should be moved by x direction.
    • stage goes with +5mm in x direction.
    • MPPC eff. {98%, 100%, 98%, 80%}
    • stage: x+2, y-2
    • MPPC4: x->east direction +5mm
    • eff.={100%,100%,97%,95%}
Telescope/ROI
  • apply -20V as HV.
  • do self-trigger scan and check hitmap. (calibGui)
    • some modules can detect signal from beam.
  • run external-trigger scan (cosmicGui) with check on online monitor
  • signal
    • some module can detect signal from beam. but it is not good.
  • Latency
    • 235 (last testbeam)-> not good
    • 240 -> bad (disappear signal)
    • 230 -> good (lv1 peak is 6 bc)
    • 232 -> best! (lv1 peak is 3-4 bc)
    • HSIO2 Latency -> 232
  • alignment
    • stage: z->-10mm
    • stage: x->+5mm
    • stage: x->+2mm, y->-2mm
    • some modules positions are modified.
    • but KEK133 has not signal from beam
  • KEK133 debug
    • No hit ? of KEK133 inspite of fixing position.
    • see config for masking pixel and noisy pixel
    • almost all pixel are masked... (calibGui -> config stearve -> edit)
    • clear mask
RD53A /XpressK7test for alignment
  • test for alignment
    • apply -20V as HV to Quad and V4S02
    • run noise scan instead of exttrigger scan (external trigger scan does not work well now...)
    • can not detect signal from beam...
    • apply -50V -> no signal...
    • wrong position ??
    • can not see signal at any positions...
  • Timon made new firmware:
    • syn/2020_02_27-rd53a_325_3x4_160Mbs_tb.bit
    • cannot any scan by using this firmware
    • install newest software
    • cannot pass config to Quad
    • GND...

Feb26,2020

7:00 setup at beam line

15:00 security check

23:00? tune FEI4 modules and RD53A modules

25:00 control accese practice

setup overview

  • LECO frame on stage at west side. fix frame on stage with LECO frame by FNAL technisians.
  • other things at east side. north-east area has 3rd floors structure.
    • 1st floor: power tap x2 (DAQ and PC -> same power tap for common GND)
    • 2nd floor: HSIO2
    • 3rd floor: picoscope, Seabas, Lenovo PC, raspi, level shifter
    • other side: atlaspc14, LVx6
  • On upper LECO frame: nwtwork switching hub, HV protection board
  • On side LECO frame: LGAD amp3, fan cooling FEI4
SeabasTLU
  • RJ45_0 -- XpressK7 portD
  • CMOSin0 -- HSIO2 LEMO4 (J24)
  • CMOSout0 -- picoscope chA
  • CMOSout1 -- picoscope chB
  • CMOSout2 -- picoscope chC
  • CMOSout3 -- picoscope chD
  • CMOSout8 -- HSIO2 LEMO1 (J21)
  • NIMin6 -- DRS4 TRG OUT
  • NIMin7 -- ROI (KEK122 HitOr via level shifter)
  • NIMout2 -- DRS4 TR0 for LGAD strip trigger
  • NIMout3 -- DRS4 TR1 for LGAD pad trigger
  • MPPCctrl{1,2,3,4} -- MPPC{1,2,3,4}
HSIO2/Telescope

XpressK7 /RD53A

DRS4/LGAD

  • strip - Amp3の配線:(ch9->J10, ch10->J9), (ch11->J12, ch12->J11), (ch13->J14, ch14->J13), (ch15->J16, ch16->J15)にしてしまった.
  • LGAD pad - DRS4間のcableが短い.
rd53a scan
  • can not pass config
  • AldoAnalog /DigitalTrim 22->19
  • can pass config

Feb25,2020

iseg software -->atlaspc9 only

patch pannel → C3_2 broken?

if use global network we must stop sshd system.

Fan in cooling box voltage -->8V for not LGAD wire peeling

cooling by only peltier (not use dryice) -> rearch -20℃/-18℃ (no fan in cooling box)

Feb24,2020

beam line外でsetupを組む.module等のテストを行う.

MPPC0がなぜか死亡していた.(high current)

raspi 192.168.7.32

atlaspc14 192.168.7.111

atlassi01 192.168.7.121 (old thinkpad laptop)

jtag conflict when one pc connects 2jtag for xpressk7 and seabas

-->one for xpressk7=Lenovo laptop

Feb23,2020

arrive at Chicago at am 7:00?

move Fermilab

get dormitory key

no working

Prepare at KEK

Install HSIO2 Software Into atlaspc14 (CentOS7) 26.12.2019

以下を参照

  • ~/work/SiliconMemo/memo/memo_hsio2_CC7.txt
  • ~/work/SiliconMemo/memo/memo_HSIO2_manchesterencode.txt
参照ページ firewallの解除
  • $ emacs -nw /etc/sysconfig/selinux
    • SELINUX=permissive
  • $ echo 0 >> /etc/selinux/enable
  • $ systemctrl disable firewalld
software install apply manchester encode
  • FPGAからHSIO2にコマンドを送る方のsignal clockが40MHzなので,80MHzにして,AC couopleによるsignal heightの減少を抑える.
  • $ emacs -nw ~/work/HSIO2_FEI4/pixelrce/rce/pixelrce/server/CalibGui.cc
    • add [ fw.setEncoding(rce,FWRegiseters::MANCHESTER); ] between [ int rce=it->firsts; ] and [ fw.setTriggermask(rce,0);
    • add [ fw.setEncoding(rce,FWRegiseters::MANCHESTER); ] between [ int rce=it->firsts; ] and [ //Discriminator Delays ]

NOT write firmware

DHCP service ON to apply HSIO2 IP address

  • $ emacs -nw /etc/dhcp/dhcpd.conf
    • host dtm50 { option host-name "dtm10"; hardware ethernet 08:00:56:00:44:EE; fixed-address 192.168.1.10 }
    • (hardware ethernet = MAC address of HSIO2, これで識別している)
  • 設定→ネットワーク(右上の有線設定からでも可)→USB Ethernetの設定→IPv4
  • 手動
  • address:192.168.1.22, net mask:255.255.255.0, gate way:192.168.1.1
  • (この接続はネットワーク上のリソースのためだけに使用にチェックを入れたいが,入れると適用ができないので以下のことを行う)
  • $ nmcli connection modify [eth] ipv4.never-default true(上のところにチェックが入ったことを確認)
  • ON→OFF→ON
  • $ systemctrl restart dhcpd.service
  • $ chkconfig dhcpd on
  • $ systemctrl status dhcpd.service
  • $ ping 192.168.1.10
  • (communicationを簡略化?させるために,HSIO2:192.168.1.10をある名前に紐づける)
  • $ emacs -nw /etc/hosts
    • add [ 192.168.1.10 dtm50 rce0 ]
  • $ ping rce0

Time Schedule and To Do List

FNAL time schedule

  • 01/31までに同期試験を終わらせる
  • 02/10に荷物発送
TLU関係(勝哉)
  • TLU board (Seabas)のfirmwareの書き換え
  • fake triggerを送る
  • signalの送受信のチェック
trigger関係(勝哉)
  • 現在のMPPCの動作チェック
  • new board作成 x5
  • LVDS signalをオシロスコープで確認(100 ohm terminater)
  • threshold levelの変更
Telescope (FEI4)関係(谷野)
  • pcとのcommunication
  • 6 moduleすべての動作確認
  • 各moduleのbump剥がれの位置を探す(source scan)
  • tuning
  • NIMでbusyなどのsignalを受け取れるかチェック
  • event buildのチェック(trigger handling, TLUからfake triggerを送る)
DUT (RD53A, quad version)関係(谷野,望月)
  • event buildのチェック
  • quad versionに関してはHVとか
LGAD関係(植田,大鳴)
  • DRS4 (DAQ for LGAD)とPCのcommunication
  • AMP作成
  • LGAD (PAD)が本当にsignalを受け取ったかどうかわかるようにする.(Pixelのようにcorrelationで確認することができないため)
Frame関係(原田)
  • Frame作成
  • cablingの仕方など
Cooling system関係(大鳴,植田)
  • cooling box作成?
1月末までを目処に

Frame / cooling system

frame size : total 2.75m in USA. (in Japan : 3m)

cooling box -> separate option

TLU / Seabas関係

atlaspc9:~/work/FNALtestbeam2019/

install ISE to work Seabas

ISE is like vivado (newer one -> FPGA). ISE is old one.

download Xilinx_ISE_DS_Lin_14.7_1015_1.tar at Xilinx. extend it at /opt/Xilinx/Downloads

$ ./xsetup

ISE Design...

NOT checkbox "cable Driver" (?)

$ source /opt/Xilinx/14.7/ISE_DS/setting64.sh

$ ise

how to compile and write firmware

FermilabTestbeamTop -> FermiLab testbeam information -> FermilabTestbeam2018 -> DAQ Software / Trigger Logic Unit (TLU) -> TLUfirmware -> how to use ISE

Lisenceによる問題でcompileできない→解決

firmwareを焼く

  • firmwareを焼く際にcable driverのreinstallによる問題→解決(library?)
  • xcf16pの方はいじらない(cancel)
  • xc5vlx50の方は,TLU_topを選択(pathを合わせること)
TLU_top
  • triggerをclockでTLUから出す場合 (dummy trigger)
    • line248:For emulationの以下3つuncomment
    • line260:For Actual Triggerに含まれるものをすべてcomment out
    • line570辺りで,どのNIMからtriggerを送るか書かれている.
  • NIMCMOSout[0][1]はSeabasのRJ45の隣のLEMO
  • それ以外はadapter boardのLEMOから出る
  • 書き換えたらcomplile & Firmware焼き

Software関係

  • edit
    • $ emacs -nw /PATH TO SOFTWARE/scripts/setup_SeabusTLU.sh
      • SEABUSDIRのpathを修正
    • $ emacs -nw /PATH TO SOFTWARE/bin/startrun
      • DATABASEDIR,XpressK7dir,XpressK7FILE,HSIO2DIRを修正
      • (TLUのrun#,XpressK7のrun#などがわかるようにするだけ)
  • dummy triggerを送る場合
    • $ source /PATH TO SOFTWARE/scripts/setup_SeabusTLU.sh
    • $ ./trigenable
    • NIMCMOS0,1に該当するLEMOからsignalが出ているか確認

MPPC関係

従来のMPPCの生存確認

(去年のLogによると,3と4は死亡,0と2は生存)

setup

  • Low Voltage : 5V(0.068uA) / -5V(0.048uA)
  • High Voltage : -55V(1uA) ; keithley2410
  • check signal from LEMO by ocsilloscope (picosope)
test result
  • MPPC0 : 2.76V(0.1uA) / -5V(0.014uA), -56V(1uA), high LV current
  • MPPC1 : 5V() / -5V(), -56V(1uA), NO signal
  • MPPC2 : 5V(0.068uA) / -5V(0.048uA), -55V(1uA), ALIVE
  • MPPC3 : 1.02V(0.1uA) / -5V(0.009uA), -58V(), high LV current
  • MPPC4 : 1.24V(0.1uA) / -5V(0.009uA), ---V(---), high LV current
make new board and check signal
  • Drawing Repository -> KEK -> SciMPPCtrigger -> MPPCReadOut _v5 -> MPPCReadOut _revC.pdf ( https://cernbox.cern.ch/index.php/s/MiwFjlIDetdQ8BC?path=%2FKEK%2FSciMPPCtrigger%2FMPPCReadOut_v5#pdfviewer)
  • remove MPPC from old board and attach on new board if the board does not work.
  • check raw signals from MPPC at H1&H2 when apply HV(-55V). (attach capacitor and resistor)
    • raw signals : raise with a few mV, they are in same time, reverse signal.
    • base line of raw signal (minus amplitude) should be higher than another. base line is related to DAC/P1 resistance.
  • check signals from comparator (LM360) at H3
    • apply LV(+/- 5V)
    • signal from comp1 and from comp2 rise in same time.
    • pulse hights : ~400mV
  • check signal from AND on pad2 of MV1.
    • if you can not apply LV with +/-5V when attach AND IC, the IC would be broken.
    • pulse hight : ~200mV
  • check TTL signal from MV1 at R30,31
    • pulse hight : ~400mV
    • 0.6 us
  • check LVDS signal at DS1 pad7,8
  • check final signal at LEMO
    • pulse hight : -550mV
    • 0.6 us
    • attach 50 Ohm terminator
  • signal
  • 前回死亡したMPPCは,ANDのところが壊れたことが原因?
    • FermiにICをいくつか持っていく
  • MPPCを5つ作成(予備を含む)

threshold Level

-->see daccontrl at software

HSIO2 Operation

HSIO2のFPGAでserverを立ち上げる

  • $ ssh rce0 -l root
  • # source setup.sh
  • # calibserver
GUIで操作
  • 別のTerminalを開く
  • $ source ~/daq/rce/scripts/setup-env.sh
  • $ calibGui
Calibration GUI
  • Load : KEK132_133_134_141_144
  • Config Root Dir : /home/atlasj/work/HSIO2_FEI4/FnalPreAtKEK-20191225/rceconf/
  • Data Dir : /home/atlasj/work/HSIO2_FEI4/FnalPreAtKEK-20191225/data/
  • chose using FrontEnd at Config Halfstave A ( test KEK112 [quad] and KEK134 [double] and KEK141 [double] )

Telescope

memo:manchester encodeについて

  • readout側(受け手)はclockが160MHz(6.25ns)
  • command側(送り手)は40MHz(25ns)だとsignal clockにうなりが生じる->80MHz(12.5ns)にすることで改善
  • ※ちなみにcommand側を160MHzにするのは難しい->送り手は丁寧なscriptを作る必要があり、受け手に比べて大変
->KEK141(信号を送る前->送った後:1.79V,0.778->1.79V,1.039A),KEK112(analog:1.5V,0.025A->1.499V,1.062A , didital:1.2V,0.282A->1.2V,0.125A)のFEI4を用いて、

picoscopeでcommand側を確認したところ40MHzだった。

->解決した:新しいsoftwareのGUIにmanchester encodeをON or OFFにするbuttonがあり、それがOFFになっていただけだった。

->picoscopeで確認:80MHzになっているか確認しようとしたが、結果として40MHzのものを区別するのは難しいことがわかった。

          というもの40MHzの場合において25nsより大きいclock(山)があるとき、manchester encode機能させると波形の違いがわかるわけだが、

          今回の場合だと25nsくらいのclock(山)だったので、周期がずれることの確認が出来ただけだった(0->1,1->0に入れ替わる)。

--MEMO--

often occur "core dump". this is because there are a lot of noise of the FEI4. if it do, you should short HV GND and LV GND, which attach jumper pin at "PHV" header pin.

manchester encodeをonにした場合におけるその他のFEI4

  • KEK132(信号を送る前->送った後:1.79V,0.782A->1.79V,1.004A),KEK112(analog:1.5V,0.024A->1.499V,1.062A , didital:1.2V,0.241A->1.2V,0.124A)->config通った
  • KEK134(信号を送る前->送った後:1.79V,0.772A->1.79V,0.998A),KEK112(analog:1.5V,0.023A->1.499V,1.062A , didital:1.2V,0.275A->1.2V,0.124A)->config通った
  • KEK133(信号を送る前->送った後:1.79V,0.856A->1.79V,1.012A),KEK112(analog:1.5V,0.024A->1.499V,1.063A , didital:1.2V,0.278A->1.2V,0.125A)->config通った
  • KEK142(信号を送る前->送った後:1.79V,0.817A->1.79V,1.038A),KEK112(analog:1.5V,0.023A->1.499V,1.061A , didital:1.2V,0.275A->1.2V,0.124A)->config通った
  • KEK144(信号を送る前->送った後:1.79V,0.809A->1.79V,1.061A),KEK112(analog:1.5V,0.024A->1.499V,1.061A , didital:1.2V,0.276A->1.2V,0.124A)->config通った
LV via emulator
  • C2_0 -> KEK144, C2_1 -> KEK142
  • LV : 2.0V / 2.4A
  • pass config of 2 modules.
Source Scan Test to Decide Position

the FEI4s have bump peel, so we need to check where we use of each FEI4.

we use 1st chips? of all FEI4 because 2nd chips? have wide bump peeling.

KEK1?? -> all over peeling??? can not see signal from checking source for any time. (HV and LV applied properly)

同期試験(01/31/2020~)

setup about hardware

Trigger signal

  • Telescope :: Seabas CMOSout8(LEMO) -> HSIO2 "1, J21"(LEMO)
  • LGAD :: Seabas NIMout(LEMO) -> DRS4 "TR0"()
  • RD53A :: Seabas RJ45_0(RJ45) -> YARR "portD" via RJ45toDisplayPortAdapterBoard
  • MPPC :: Seabas MPPCctrl1(RJ45) <- MPPC "RJ45"
Busy signal
  • Telescope :: Seabas CMOSout8(LEMO) <- HSIO2 "4, J24"(LEMO)
  • LGAD :: Seabas ??? <- DRS4 "GPO"
  • RD53A :: same trigger signal system.

TLU (Seabas)

send dummy trigger to each DAQ systems except for MPPC.

MPPC

temporary edit TLU_top : LVCOMSout[0] = dout[0]; //MPPC0 (line568 in PicoscopeA)

RJ45 on MPPC --- RJ45(MPPCctrl1) on TLUadaputer (not use LEMO on MPPC)

apply LV(+/-5V) and HV(-55V) to MPPC, and put Sr(90) on MPPC.

check signal from CMOSout0 (TLUadapter) by picoscope.

memo

  • dout[0] is a pin of MPPCctrl1 RJ45 and is "p" LVDS signal from MPPC1.
  • dout[1] is a pin of MPPCctrl1 RJ45 and is "n" LVDS signal from MPPC1.
  • the LVDS signals is changed to CMOS at FPGA on Seabas.
Telescope

HSIO2 Operation

  • $ ssh rce0 -l root
  • # source setup.sh
  • # calibserver
  • open other terminal
  • $ source ~/daq/rce/scripts/setup-env.sh
  • $ calibGui
  • chose correct configs. analog scan.
  • check Key #
Cosmic Gui to check event build
  • close this terminal. open other terminal
  • $ cd /PATH TO HSIO2 CONFIG/ (/home/atlasj/work/FNALtestbeam/HSIO2_FEI4/FnalPreAtKEK-20191225/rceconf/configs)
  • $ cosmicGui -i 192.168.1.22 (HSIO2 IP)
  • Tab -> config DUT 1-16
    • check box using Front End
  • Tab -> main
    • load config and fill Key #
    • check box of "Use Manchester Encoding"
    • File Format -> "Raw" and "ROOT"
    • Trigger Sources -> "HSIO2 Ext1", Logic -> "AND",
    • Hitbus Chips -> TA Logic -> "OR"
  • Start Run
XpressK7

use software : /home/atlasj/work/FNALtestbeam2020/XpressK7/Yarr-20200117

communication with PC and XpressK7 -> $ ./bin/specBenchmarkDma

exttrigger scan -> ./bin/scanConsole -r configs/controller/specCfgFnal.json -c configs/connectivity/example_rd53a_setup.json -s configs/scans/rd53a/fnal_exttrigger.json -m 0/1 -p

data : data/00xxxx_fnal_exttrigger/JohnDoe_0_data.raw

plotting data : $ ./plotting/read_rawData data/00xxxx_fnal_exttrigger/JohnDoe_0_data.raw

LGAD
  • $ wavedump -> s -> shift + p
  • busy 信号
    /home/atlasj/work/LGAD/DRS4/wavedump-3.10.0/src/WaveDup.cに
    CAEN=CAENComm_Write32(handle, 0x8000, 805312784);GPOにbusyを入れる
    CAEN=CAENComm_Write32(handle, 0x8110, 3);GPOから信号を出す
    を追加
    wavedump起動時にregisterを書き換えてくれるようにした
    ->trgger信号から約200us幅のNIM信号を確認
  • 接続メモについて  flashADC→3段目→fermi(amp種類)(予定)

  • ch1→J1→J1(16ch) ch2→J2→J2(16ch) ch3→J3→J3(16ch) ch4→J4→J4(16ch) ch6→J6→J6(16ch) ch7→J7→J7(16ch) ch8→J8→J8(16ch) ch9→J9→J9(16ch) ch10→J10→J10(16ch) ch11→J11→J11(16ch) ch12→J12→J12(16ch) ch13→J13→J13(16ch) ch14→J14→J14(16ch) ch15→J15→J15(16ch) ch16→J16→J16(16ch) ch17→→J1(4ch) ch18→→J2(4ch) ch19→→J3(4ch) にする

  • ←32chのADCが使えるそうで余裕をもって使えるので、実装していない16chアンプの5chと4chアンプの4chを飛ばして配線すると分かりやすいかと
  • fermiの16ch ampの方と3段目のチャンネルの順番が少し違うので配線時に注意(3段目は表がJ1.3.5.7.9.11.13.15と並んでいるが、fermiの16chは1.3.5.7.10.12.14.16と並んでいる)

Comments

ーーーーMEMO------

trigger : scintillator MPPC x4 (upx2, downx2)

MPPC work check, new board<-- MPPCだけ取り換え x5 (including spare). CHECK BY ocillorscope LVDS (kind of signal, this is high believed, 100Ohm terminator (between positive and negative) )

apply high vol and low vol <-- RJ45 (LVDS) threshold level change

check threshold level.

CBOS : TLU board instead of TLU box. FPGA board. FPGA board : programable. logical calculate. instead of NIM nodule. AND, OR circuit.

VERTEX5, VERTEX4 on CBOS. TLU adapter board is gaven signals and sent CBOS board. now CMOS signal is converted to ...signal by VERTEX

path : DrawRepository /2FKEK%2FFNALtb%2FTLUadaptercard%2FTLUadaptercard_revB%2FProject%20Outputs%20for%20TLUadaptercard_revB#pdfviewer

TLU data : clock timing , scinti signal.

eventsの同期 →busy signalが保証. しかし,たまにずれていることがある.オンラインモニターで常に確認すr必要がある.correlation.

each DAQ system.

FEI4 NIMでbusyやsignalを受け取れるかcheck.

FEI4 x6 module working check, bump剥がれの位置をcheck, FEI4 tuning, test with ALL 6 FEI4.

when auto trigger mode on FPGA, FEI4 sent signal. (trigger handling)

RD53A trigger handling. event counts.

LGAD DAQ : DRS4 flash ADC 200ps charge signal.


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Topic revision: r74 - 2020-03-11 - AtlasjSilicon
 
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