FE65p2ChipDAQ < Main

---+ DAQ development for FE65-P2 chip

%TOC%
---++ Introduction

FE65-P2 is the readout ASIC with 65nm processing as pre-pre-production for the RD53A /B chips used by HL-LHC ITK pixel upgrade.

more information is available in :

[[https://indico.cern.ch/event/521362/contributions/2135945/attachments/1259134/1860052/AUW_KEK_Pixel_20160418.pdf][motivation talk in AUW April 2016]]

[[https://indico.cern.ch/event/521370/contributions/2135196/attachments/1260660/1863032/2016_04_20-fe65p2-status_theim.pdf][Timon's talk in AUW April 2016]]

[[https://twiki.cern.ch/twiki/bin/view/Main/TimonHeim?forceShow=1][Timon's Twiki]]
---++ Bump Bonding at SLAC
---++ DAQ development by SPEC
   * Installed CERN !CentOS7 to pcatutt21.cern.ch
   * Installed SLC6 to keksipc01 : at KEK ip=130.87.243.35

-- %USERSIG{KojiNakamura - 2016-04-21}%

This topic: Main > WebHome > FE65p2ChipDAQ
Topic revision: r2 - 2016-05-19 - KojiNakamura