-- Katsuya Sato - 2020-11-12

• • ref: https://javispedro.com/fpga/xilinx-usb-linux.html
  • ref: https://forums.xilinx.com/t5/FPGA-Configuration/programming-FPGA-JTAG-Centos-7-Impact/td-p/726397
  • download old? vertsion of libusb.so and create symbolic link @/opt/Xilinx/14.7/ISE_DS/ISE/lib/lin64

• • USE THIS VERSION: syn/2020_03_02_rd53a_325_3x4_160Mbps_tb.bit (2020/07/30)

• stage shift (vertical) :344.7mm->349.9mm
• Quad Lcc off without ROI
• latency: 250->230
• busy1ms or 500us.
• applied noise scan and enmask by analog scan.
• --> Correlation Lost at 1 spill. this is due to beam rate = beam size?

• • $ cd /home/atlasj/work/FNALtestbeam/XpressK7/Yarr-20200227
  • $ ./bin/spenBenchmarkDma (communication check with XpressK7)
  • $ ./bin/scanConsole -

• DRS4/DRS4converter -> ./converter.sh (raw data->root file)
• latency scan:

• before this time, maybe ROI did not work. in firmware we didnot apply coincidence of scinti and ROI.

• • ROI overall -> 16/20, 8/12

• hitbus of ROI setting is reflected when run (NOT when do analogscan. you shuld do run-cosmicGui. anyway, edit hitbus file->close cosmicGui->open calibGui->scan analog->close calibGui->opencosmicGui-> start run--> applied setting)
• before data maybe ROI setting did not been reflected.

• LGAD latency scan
  • (busy 3ms, with ROI,
  • latency 15: positive signal over than 0.2V events are 5 within 28k events (TLU227, LGAD105)
  • latency 30: positive 4 events within 12k (TLU228, LGAS106)
• なぜか，channel-22,23,24に変更(EventLoopManager)したら信号（positive)が見えた．(DRS4側では，下のchannelの中の，上から5,6,7番目のchを使った）

• hitbus of ROI setting is reflected when run (NOT when do analogscan. you shuld do run-cosmicGui. anyway, edit hitbus file->close cosmicGui->open calibGui->scan analog->close calibGui->opencosmicGui-> start run--> applied setting)

• ROI region (average ROI pixel size=(250,50)
  • Col:0-80, Row:336-672 (0-336) in RJ1 were enable on hitbus --> see signal of both
  • Col:0-80, Row:456-672 (120-336) in RJ1 were enable on hitbus --> see signal of both
  • Col:0-40, Row:456-672 (120-336) in RJ1 were enable on hitbus --> 1/12
  • Col:40-80, Row:456-672 (120-336) in RJ1 were enable on hitbus --> see signal of both
  • Col:40-60, Row:456-556 (120-220) in RJ1 were enable on hitbus --> see signal of both (5mm*5mm area)
  • Col:40-50, Row:456-506 (120-170) in RJ1 were enable on hitbus --> see signal of both
  • Col:50-60, Row:506-556 (170-220) in RJ1 were enable on hitbus --> see signal of both but offtime
  • final position: Col:40-50, Row:456-506 (120-170) in RJ1 -->run#309 (10:20)

• LGADにbeamを当てるために，beam narrowにして，ROIを外して，beam profileを見て，stageを動かす．
• stage (1817.2, 344.9) -->(1822, 349.8) 動かしすぎた？
• stage (1817.2, 349.8) --> (1819.5, 349.8)
• ---->can not see LGAD signal by trigger from ROI and scinti (trigger 15k)
• -->-->--> we should make ROI more narrow...

• • Col:45-50, Row:456-506 (120-170) in RJ1 were enable on hitbus --> half event?
  • Col:40-45, Row:456-506 (120-170) in RJ1 were enable on hitbus --> meore event than above
  • Col:42-47, Row:456-506 (120-170) in RJ1 were enable on hitbus --> it looked good
  • Col:42-47, Row:456-481 (120-145) in RJ1 were enable on hitbus --> 9
  • Col:42-47, Row:481-506 (145-170) in RJ1 were enable on hitbus --> 4
  • Col:42-47, Row:461-486 (125-150) in RJ1 were enable on hitbus --> ?
  • Col:42-47, Row:466-491 (130-155) in RJ1 were enable on hitbus --> best Region Of Interesting

Mar10,2020

7:20

• accese beamline
• LGAD pad signal -> picoscope

• Quad:-100V
• ROI: RD53A _full version
• YArr Latency 245-->250

• before this time, maybe ROI did not work. in firmware we didnot apply coincidence of scinti and ROI.
• ROI area
  • # of ROI signal against LGAD signal (ROI/LGAD)
  • ROI overall -> 16/20, 8/12
  • only RJ1 (mainly use) on ROI -> 0?
  • only RJ4 (same col, lower row) on ROI -> 0??

9:11

• hitbus of ROI setting is reflected when run (NOT when do analogscan. you shuld do run-cosmicGui)
• before data maybe ROI setting did not been reflected.

• ROI region
  • Col:0-80, Row:336-672 in RJ1 were enable on hitbus --> see signal of both
  • Col:0-80, Row:456-672 in RJ1 were enable on hitbus --> see signal of both
  • Col:0-40, Row:456-672 in RJ1 were enable on hitbus --> see signal of both

• • Busy interval: 1ms or 3ms (GBusyWidth)
    • because of RD53 vs. KEK112 Correlation Lost and DRS4 stacks.
  • trigger
    • coincidence of 4 MPPC
    • 4MPPC and ROI (HitOr signal). for

• • * ROI did not work well... We dont know...

• stage x:1817.4-->1829.0 (Quad edge)

• LGAD re-install.
• it looks good behaivior.

• stage x:1829.0-->1817.4 (Quad center position)
• made beam wider

• ROI making
  • hitbus ROI did not work well
  • instead of this, made enmask applied.
  • -->search for LGAD signal...

• run for 1000e threshold ended.
• rnu for edge research started. <---×
• Quad config was changed to 1500 threshold.
• without ROI because it did not work (on selftrigger it worked)

• XpressK7 /Yarr/configs/controller/specCfgFnal.json deadtime:300-->1200 for no losting correlation

• beam profile cahnged to forcused.
• and beam position was changed.
• stage x:1817.4-->1829.0

• no beam

• SeabasTLU
  • $ cd /home/atlasj/work/FNALtestbeam/SeabasTLU/SoftwareSeabasTLU-FNAL/SoftwareSeabasTLU-trunk/bin
  • $ ./startrun >& /dev/null & sleep 1 ; FILENAME=`ls ../log/rawData_tlu_run0000*| tail -1` ; head -10 $FILENAME ; tail -f ${FILENAME]
  • $ ./stoprun
• XpressK7

Mar9,2020

7:30

• Quad tuning: threshold=1000, but Linea FE tuning was bad. (FNAL_Quad_1000e_7tot_NOTUUSE.json)

• Quad tuning: first target threshold:2000, second one:1000, tot:7, target charge:10000 [003795-003810] (FNAL_Quad_1000e_7tot.json)
• the first run on this condition was #272.

• finished run: Quad [1500e,150V, and overall]
• to take data for Quad edge, set ROI Row = (164-184) enable.
• Quad same tuning.

Mar8,2020

7:30

• accese beam line
• LGAD problem solution
  • strip
    • HV : ~-120V: no current, 120V~: current increased (-200V:80uA@20℃)
    • no signal by using beta-ray checking source
  • pad
    • HV : current was constant 0 at 0~400V
    • cable of LEMO-LGAD had been broken. fixed it.
    • but situation was not changed.
    • no signla by using checking source
  • amp
    • 12V --> too noisy to see signal. (2V heights)
    • 5/6V --> ?
  • --> all LGAD setup moves to control room to research cause of this.

~11:00

• no beam

• make RD53A tuning files: FirstThreshold2000, secondThreshold1000, TargetCharge10000, ToT7 (FNAL_Quad2_1000.json, FNAL_V4S02_1000.json)
• miss and remove this files.

• beam. beam profile was changed to narrow.

• no beam

• • NIMin7 -- ROI (KEK112 HitOr via level shifter)

• ROI
  • mkmask.sh is script for ROI.
  • /PATH FNALtestbeam/HSIO2/DATE/mkmask
  • select region and edit mincol, maxcol, minrow, maxrow
  • $ cp tempfile rceconf/masks/hitbus_KEK112_RJx_primlist_4local_fe0_xxxx.dat
  • edit Seabas firmware: add ROI HitOr to trigger. (TLU_top_1msROI.bit)
  • * if include ROI, Yarr latency should be changed. it is better to be plus 15 to latency (230-->245) in configs/scans/rd53a/fnal_exttrigger.json

9:23

• ROI include.
• run223
• --> wrong latency of RD53A

• latency of Yarr: 230-->245
• run224

Mar7,2020

7:00

• wide beam

• noise scan to v4s02
• run 193

• add V4S02 module (including 2 modules)
• run188

• remove Quad (only V4S02)
• run190 (run189 is empty)

• both RD53A modules.
• run191

• beam became wider

• shift stage by x:+2.6mm and y:-2.1mm for beam to meet at edge and high row (noisy for Quad) area.
• start run 182

• run184: only 1 RD53A (Quad)

Mar6,2020

7:00

• beam wider

• changed Yarr firmware to old version(03_02).
• after this, run 179.

• • portA -- Quad
  • portC -- V4S02

• • • able to handle 2 modules at same run.
    • work trigger/busy system
  • fix-fix version --> /PATH TO YARR-FW/syn/2020_03_05_rd53a_325_3x4_160Mbps_tb.bit
    • able to handle Nakamura-san board and trigger/busy signal via the board.

• • Run
    • ./bin/scanConsole -r configs/controller/specCfgFnal.json -c configs/connectivity/FNAL_setup.json -s configs/scans/rd53a/fnal_extrigger.json -n 1

• changed XpressK7 trigger system
  • TLU - XpressK7 via Nakamura-san board on Ohio card(not use DisplayPort -RJ45 adapter)
  • use new firmware.
• LGAD position changed
  • lower by 15mm.
• after this, run 167.

• retune V4S02 [003556_digitalscan ~ 003571_totscan] and noisescan [003572-3579]

Mar5, 2020

8:30-9:00

• can not pass config of KEK133
• -->maybe this is due to charge up from HV
• -->"stroke" LVDD, LVDA.

Mar4,2020

• retune V4S02 [003556_digitalscan ~ 003571_totscan] and noisescan [003572-3579]
• from run158 same Quad config and new V4S02 config applied mask.

• KEK142 19.5cm
• KEK144 25cm
• KEK112 29cm
• RD53-V4S04 32cm (portC)
• RD53-Quad 40.5cm (portA)
• LGAD strip (50-62cm)
• LGAD pad (50-62cm)
• KEK134 73.5cm
• KEK141 86cm
• KEK132 99cm
• KEK133 106.5cm

• can pass config to modules at same time.
• a bit fix of KEK141
• measure z position of all modules except for LGAD. (difficult to measure because it is in cooling box)

Mar3,2020

HVのケーブル長いのしか置いてない．cablingがぐちゃぐちゃになってしまう．

全体のcablingをきれいにまとめたい

• 192.168.7.115: Hara-sensei's PC
• 192.168.7.116: katsuya's PC

• 192.168.1.10: rce0: HSIO2; 192.168.1.22: USB ether atlaspc14
• 192.168.10.16: SeabasTLU; 192.168.10.50: USB ether atlaspc14

• • • • spiConfig : 524288 --> 541200 --> 524288

Mar3,2020

debug and analyse

• lost correlation problem
• xpressK7 wrong tag : 666

• TLU107, Xpressk7:3455, HSIO2:151, DRS4:24

Mar2,2020

• move RD53A by x:+5mm

• TLU107, Xpressk7:3455, HSIO2:151, DRS4:24

• shot run: TLU109, Xpressk7:1457, HSIO2:152, DRS4:25

• accese beam line
• fix RD53As position: beam sync->diff (x+10mm moved)
• try to pass config of V4S02
  • exchanged modules with Quad and V4S02, changed LV, connected to XpressK7 with GND, direct mode. no communication with portC modules.
  • when used old firmware and old software --> pass confis to portC
  • asked to Timon...

• • • • "config" in TrigConfig : 65534

• • portB,C are similar to portA

• --> took data when trigger cames, but events is so few.

• debug Yarr: specCfgFnal.json: config-->65534 from 1
• busy: 100us
• TLU99, XpressK73269,HSIO2142,DRS417
• --> Yarr data taking looks good!

• busy: 1ms --> TLU100

• busy: 400us --> TLU101

Feb 2020 Testbeam Log

• Ohio Card (there are some ohio cards whome patterns are different. you should CHECK)
  • portA (this pattern is able to be used for communication with module)
    • {C6,C7},{C9,10},{C12,C13} = capacitor
    • {C15,C16} = resistor for trigger handling (trigger freq << data freq)
    • {C3,C4} = capacitor
    • {R11,R12} = Nothing
  • portB,C is similar to portA
  • portD (for trigger / busy)
    • {C57,C58},{C60,C61},{C63,64} = resistor (trigger handling, which is low frequency)
    • {C66,C67} = capacitor
    • {C54,C55} = resistor
    • {C99,C107} = resistor

Mar1,2020

15:00-16:00

• Timon said that firmware dealing with correct DP-RJ45 communication connectivity is "2020_02_21_rd53a_325_3x4_160Mbps_tb.bit".
• changed firmware. (other words, undo firmware)
• occured to take data always in spite of beam.
• Timon said the problem is maybe due to ohio card. ohio card we used in present is uncorret?

• VME did not work well. unstable.
• this reason was why data in VME was full so organized data.

• accese beam line.
• exchanged ohio card.

• connectivity of Seabas adapter - Yarr (RJ45 - DisplayPort)
  • Trigger (TLU-->Yarr) : "TRIGGER" (n and p)
  • Busy (Yarr-->TLU) : "BUSY" (n and p)

• • --> 3.5V / 2.06A stable communication.
  • --> --> 3.8V / 2.9A to make (CMOS) signal level 3.3V. LVDS for Yarr need 3.3V to work.

• debug could not receive busy signal from Yarr
• this was due to not sending trigger signal from Seabas to Yarr
• LVDS IC was broken?

• beam line accese
• check LVDS driver on TLU adapter board
• applied voltage to LVDS was ~2.4V. (CMOS Level was same voltage)
• same times, we noticed incorrect DP<->RJ45 pin.

• when applied voltage Seabas: 3.5V (2.06A) --> 4.8V (2.93A) at iseg, CMOS level became 3.3V
• accese beam line
• voltage at Seabas input was 3.6V. detected trigger signal at "TRIGGER" on DP-RJ45 adapter.
• asked to Timon that modify Yarr firmware.

• dead time = 3ms for synchronous work

• • OLD version --> /PATH TO YARR-FW/syn/2020_02_21_rd53a_325_3x4_160Mbps_tb.bit
  • fix version --> /PATH TO YARR-FW/syn/2020_02_29_rd53a_325_3x4_160Mbps_tb.bit

• Timon made new firmware. (old one is uncorrect. trigger signal and busy signal pin are different. when run in no beam time, get data taking)
• new firmware --> data size is always 0.

• couldn't see the trigger of LGAD -> we could see when we restart the power of VME.

• Hardware
  • 3.3V / 2A
  • unstable communication (sometimes this occurs when current decrease down to 1.5A.)
  • --> 3.5V / 2.06A stable

• • • • "config" in TrigConfig : 1

• cabling connection

• Firmware
  • Busy interval: 3ms (GBusyWidth)
  • trigger: coincidence of 4 MPPC

Feb29,2020

CMS groups moved beam position and beam profile and undo

15:00

• cntrol accese
  • fix LGAD strip-AMP cable connection (change amp side)
  • check HV connection of LGAD (cannot read IV)

• TLU65, HSIO2:105,XpressK7,3197,DRS4:10
  • Telescope's HV: -20V --> -50V
  • maybe beam position and beam profiles change (CMS did not undo?)

• selection of turn off channel -> the control PC (throgh ethernet cable) (cannot work by our PC) user:admin pw:ftbf2460

• 2/27 16:00: supercycle? 60s, about 4s, 80k~90k? events per spill.

• • (36V/3A): fan cooling copper peltier --> (12V/3A)

• TAKASAGO ZX-S-400LN -> Copper Peltier -> 30V/3A

• • • • disable auto-zeroing : "autoZero" : { "word" : 0, "interval" : 100 }

• • analysisRawData.cpp needed to be adapt to take 32BC data tag. --> see fnal_tb_feb_2020 branch in yarr repo.

• fix positions of RD53As and Telescopes.

• dead time = 3ms for synchronous work
• TLU63, HSIO2:101, LGAD:8
  • first run added LGAD (strip) (apply HV)
  • LGAD strip HV: 330V/90uA (conncting protection board)
  • MISSTAKE: not apply 6V to LGAD amp.
• TLU64, HSIO2:102, LGAD:9
  • ch0 of patch pannel 650mA
  • LGAD strip gets signal data

• ~/work/FNALtestbeam/home/USER/
• source /opt/rh/devtool-set7/enable
• copy software at this path
• cd configs
• ./configure.sh
• check setup_local.sh
• source setup_local.sh
• make clean ; make
• cd ..
• make distclean; make
• onlineMonitor/src/config.txt automatically last run set
• cd Onlin/src/
• make
• ./mkconfig.sh
• ../binn/onlinemonitor config.txt
• aa
• offlineAnalusis/src/ mkconfig.sh copy to this directory from onlineMonitor
• make
• config,txt cohy to

• Quad module config remake
• when Trim=22 (defaults), pass config but there are noise at some areas including syncF.E., which is masked.
• when Trim=19, can not pass
• when Trim=25, can pass config. the noise is disappeard.
• run fnal_extrigger scan. --> appear signal col 130-240.
• this pattern signal is due to encoding problem? (maybe not to modules)

• Telescope

• TLU:39, XpressK7:3099, HSIO2:78
• V4S02 (LCCon, noise sccaned) and Telescope (without QUAD2)
• --> no siganl (there are noise data) in V4S02
• latency = 215 is not correct?

• TLU:40, XpressK7:3040, HSIO2:79
• latency = 235
• --> ...?

• TLU:41, XpressK7:3041, HSIO2:80
• latency = 240
• --> bad lv1 dist

• TLU:42, XpressK7:3042, HSIO2:81
• latency = 230
• --> bad

• TLU:44, XpressK7:3110, HSIO2:83
• latency = 230
• new config file, which is applied noise scans.

• accese beam line
• fix positions V4S02
• HV check --> it looks good
• noise scan with using checking source

• TLU:45, XpressK7:3121, HSIO2:84
• latency = 230
• fixed positions of V4S02
• --> there are signal looks like noise (col 130-240)

• • • • remove algorithm "TotMap","Tot2Map","L1Dist","hitsPerEvent" not for memory leak.

• • V4S02 has many noisy pixel at col 250
  • --> noise_scan after this run

• noise_scan against V4S02
  • 002972_std_noisescan
  • there are some noise at LIN with biasing.

• control accese
  • MPPC4 x:-5mm move
  • KEK133 x:+15mm move
  • try to pass config of RD53A -Quad
    • connct GND of XpressK7 and RD53A modules.
      • can not pass config...
    • when apply 1.85V from iseg, applied voltages of QUAD/V4S02 are 1.70V
    • when apply 1.95V at iseg, applied voltage of these are 1.82V --> apply 1.95V or 2.00V
      • cannot pass config...
    • exchange DisplayPort of V4S02 and QUAD; [V4S02,Quad]=[portA,portC] -->[portC,portA]
      • pass config!!
      • but digital/analog scan results are not clear...
    • edit configs/scans/std_digitalscans.json and analogscans.json
      • "frequency" : 30000 -> 20000
    • use default config files (edit syncFE mask, LCC on in V4S02, name); FNAL_xxx_fix.json
    • do scans when beam off time
    • --> good scan results!!

• tune Quad and V4S02 while beam stopping
• 003047 ~ 003062 (beam starts since 003060_std_tunefinepixelthreshold)
• Quad -> noLCC (configs/FNAL_QUAD2_noLCC_tuned.json) (LCC off is due to katsuya's misstake....)
• V4S02 -> onLCC (configs/FNAL_V4S02_onLCC_tuned.json)

• tune Quad and V4S02 while beam on
• 003063 ~
• Quad -> onLCC (configs/FNAL_QUAD2_onLCC_tuned.json)
• V4S02 -> noLCC (confis/FNAL_V4S02_noLCC_tuned.json)

• we noticed china house is untill 21 o'clock.

• TLU, XpressK7:, HSIO2:
  • • only V4S0

• 2/27 16:00: supercycle? 60s, about 4s, 80k~90k? events.

• Yarr OLD software (~2020/2/28)
  • Yarr software: Yarr-20200117
  • Yarr firmware: YARR-FW-20180921
  • scan: ./bin/scanConsole -r configs/controller/specCfgFnal.json -c configs/connectivity/FNALtest_setup.json -s configs/scans/rd53a/std_xxxscan.json -p

• Yarr NEW Firmware
  • YARR-FW: YARR-FW-20180921
  • /PATH TO YARR-FW/syn/2020_02_21_rd53a_multi_xpressk7_325_kojitb.bit
• Yarr NEW Software
  • Yarr-20200227
  • cannot use config files used by before software
  • debug
    • configs/controller/specCfgFnal.json
      • spiConfig : 524288 --> 541200
    • configs/scan/rd53/fnal_extrigger.json
      • remove algorithm "TotMap","Tot2Map","L1Dist","hitsPerEvent"
      • add '"triggerMultiplier": 32 ,' in "loops"

Feb28,2020

14:00 get together at control room

15:20 run22, run23

• run22: KEK133 position search: x=1824.3 (from x=1814.3)
• run23: KEK133 position search: x=1829.3 (from x=1824.3) -> KEK133 correct position; move by 3 screw holes

• can not work Externaltrigger scan
• modify spiConfig to "541200" from "524288" in configs/controller/specCfgFnal.json. original config can not deal with multi modules.
• run24: stage position: x=1814.3. sync test: HSIO2 and XpressK7 (only V4S02). -> HSIO2 counts events, but XpressK7 not.
  • ./bin/scanConsole -r configs/controller/specCfgFnal.json -c configs/connectivity/FNAL_setup.json -s configs/scans/rd53a/std_externaltrigger.json
  • -> HSIO2 counts events, but XpressK7 not.
• run25: same conditions
  • ./bin/scanConsole -r configs/controller/specCfgFnal.json -c configs/connectivity/FNAL_setup.json -s configs/scans/rd53a/fnal_externaltrigger.json
  • -> sama results... (when run fnal_extrigger.json raw data is created)
  • above comments is lie... get data taking but does not display events counts on Yarr display.
• TLUrun27, Xpress:run2960, HSIO2:run53
  • XpressK7 is forces termination
• TLU:28, Xpress:2961, HSIO2:54
  • memory leak
• debug fnal_extrigger.json
  
  • commnt out algorithm: "OccupancyMap, TotMap, Tot2Map, L1Dist, HitsPerEvent " --> DO NOT DO
  • modify n_count --> DO NOT DO
  • --> does not work read_rawData
• TLU29, Xpressk7:2963, HSIO2:55
  • does not memory leak. it looks good.
  • HSIO2 operation mistaked.

• TLU30, XpressK7:2964, HSIO2:57
  • long run

• TLU:32, XpressK7:2966, HSIO2: 60
  • debug Yarr
  • use defaults fnal_extrigger.json
  • --> work read_rawData --> dont edit fnal_extrigger.json

• TLU:33, Xpress:2968, HSIO2:62
  • run for debug

• TLU:34, Xpress:2969, HSIO2:64
  • Yarr latency: 225
  • add trigMultiplier in fnal_externaltrigger.json
• TLU:35, Xpress:2970, HSIO2:65
  • Yarr latency: 215

• ch1: HSIO2 power

• • MPPC4: x->east direction +5mm
  • eff.={100%,100%,97%,95%}

• • some modules positions are modified.
  • but KEK133 has not signal from beam
• KEK133 debug
  
  • No hit ? of KEK133 inspite of fixing position.
  • see config for masking pixel and noisy pixel
  • almost all pixel are masked... (calibGui -> config stearve -> edit)
  • clear mask

• • can not see signal at any positions...
• Timon made new firmware:
  • syn/2020_02_27-rd53a_325_3x4_160Mbs_tb.bit
  • cannot any scan by using this firmware
  • install newest software
  • cannot pass config to Quad
  • GND...

Feb26,2020

7:00 setup at beam line

15:00 security check

23:00? tune FEI4 modules and RD53A modules

25:00 control accese practice

setup overview

• LECO frame on stage at west side. fix frame on stage with LECO frame by FNAL technisians.
• other things at east side. north-east area has 3rd floors structure.
  • 1st floor: power tap x2 (DAQ and PC -> same power tap for common GND)
  • 2nd floor: HSIO2
  • 3rd floor: picoscope, Seabas, Lenovo PC, raspi, level shifter
  • other side: atlaspc14, LVx6
• On upper LECO frame: nwtwork switching hub, HV protection board
• On side LECO frame: LGAD amp3, fan cooling FEI4

• RJ45_0 -- XpressK7 portD
• CMOSin0 -- HSIO2 LEMO4 (J24)
• CMOSout0 -- picoscope chA
• CMOSout1 -- picoscope chB
• CMOSout2 -- picoscope chC
• CMOSout3 -- picoscope chD
• CMOSout8 -- HSIO2 LEMO1 (J21)
• NIMin6 -- DRS4 TRG OUT
• NIMin7 -- ROI (KEK122 HitOr via level shifter)
• NIMout2 -- DRS4 TR0 for LGAD strip trigger
• NIMout3 -- DRS4 TR1 for LGAD pad trigger
• MPPCctrl{1,2,3,4} -- MPPC{1,2,3,4}

XpressK7 /RD53A

DRS4/LGAD

• strip - Amp3の配線：(ch9->J10, ch10->J9), (ch11->J12, ch12->J11), (ch13->J14, ch14->J13), (ch15->J16, ch16->J15)にしてしまった．
• LGAD pad - DRS4間のcableが短い．

• can not pass config
• AldoAnalog /DigitalTrim 22->19
• can pass config

Feb25,2020

iseg software -->atlaspc9 only

patch pannel → C3_2 broken?

if use global network we must stop sshd system.

Fan in cooling box voltage -->8V for not LGAD wire peeling

cooling by only peltier (not use dryice) -> rearch -20℃/-18℃ (no fan in cooling box)

Feb24,2020

beam line外でsetupを組む．module等のテストを行う．

MPPC0がなぜか死亡していた．（high current）

raspi 192.168.7.32

atlaspc14 192.168.7.111

atlassi01 192.168.7.121 (old thinkpad laptop)

jtag conflict when one pc connects 2jtag for xpressk7 and seabas

-->one for xpressk7=Lenovo laptop

Feb23,2020

arrive at Chicago at am 7:00?

move Fermilab

get dormitory key

no working

Prepare at KEK

L字LEMO Connector必要（FNALにおいてあるけど）

• RJ45_0 -- XpressK7 portD
• CMOSin0 -- HSIO2 LEMO4 (J24)
• CMOSout0 -- picoscope chA
• CMOSout1 -- picoscope chB
• CMOSout2 -- picoscope chC
• CMOSout3 -- picoscope chD
• CMOSout8 -- HSIO2 LEMO1 (J21)
• NIMin6 -- DRS4 TRG OUT
• NIMin7 -- ROI (KEK122 HitOr via level shifter)
• NIMout2 -- DRS4 TR0 for LGAD strip trigger
• NIMout3 -- DRS4 TR1 for LGAD pad trigger
• MPPCctrl{1,2,3,4} -- MPPC{1,2,3,4}

• NIMin6 -- DRS4 TRG OUT
• NIMin7 -- ROI (KEK122 HitOr via level shifter)
• NIMout2 -- DRS4 TR0 for LGAD strip trigger
• NIMout3 -- DRS4 TR1 for LGAD pad trigger

• alignment
  • apply -55V as HV
  • MPPC{1,2,3,4} eff. = {95%, 100%, 95%, 30%}
  • MPPC4 whom global(x,y)=(2cm,3cm) should be moved by x direction.
  • stage goes with +5mm in x direction.
  • MPPC eff. {98%, 100%, 98%, 80%}
  • stage: x+2, y-2

• alignment
  • stage: z->-10mm
  • stage: x->+5mm
  • stage: x->+2mm, y->-2mm

patch pannel 修理（4pinMOLEX->C3_2, banana ver.->C0_1?, C3_all

cooling boxのcableが出るところを改善（LGADのcableが多すぎる...）

Information for testbeam2020

IP address

• 192.168.7.110: atlaspc9 at control room
• 192.168.7.111: atlaspc14 DAQ PC at beam line
• 192.168.7.112: Lenovo Laptop PC at beam line for XpressK7 Firmware
• 192.168.7.113: Laptop PC at control room
• 192.168.7.114: Nakamura-san's PC
• 192.168.7. 32: raspberrypi for thermo control
• 192.168.7.121: iseg
• 192.168.133.51: VME machine (user: daq)
• 131.225.176.86: power tap

iseg HV 2kV

• ch0: LGAD pad
• ch1: LGAD strip

• ch0: FEI4 x7
• ch1: RD53A V4S02
• ch2: RD53A Quad2
• ch3: nothing
• ch4: MPPC x4 (-55V -> -0.001mA)

• ch0: 6V (650mA)
  • C0_0: LGAD strip amp
  • C0_2: LGAD pad amp
• ch1: 1.8V (measure 2.3V) (2130mA)
  • C1_2: Telescope
• ch2: 1.8V (measure 2.3V) (4350mA)
  • C2_1: Telescope
  • C2_2: Telescope
• ch3: 1.8V (1440mA)
  • C3_0: RD53A Refference V4S02
  • C3_1: RD53A DUT Quad2
• ch4: 1.2V (370mA)
  • C0_2: VDDD of KEK112 (quad chip)
• ch5: 1.5V (960mA)
  • C1_0: VDDA of KEK112
• ch6: 3.3V (2100mA)
  • C2_0: Seabas power
• * C3_2 of 4pinMOLEX Patch pannel and C3_n of banana patch pannel are broken.

• ch2: VME (LGAD DAQ system. sometimes stacks data.
• ch4: raspberrypi (sometimes cannot ssh connection.
• selection of turn off channel -> the control PC (throgh ethernet cable) (cannot work by our PC)

• 2/27 16:00: supercycle? 60s, about 4s, 80k~90k events.

• PW8-5ADPS (upper)
  • 8V/5A: fan in cooling box -->8V
• PW18-1.8AQ (middle)
  • (-6V/1A, +8V/2A): MPPC, Leval Shifter, and TLU adapter board --> (-5V/-0.35A),(+5V/+0.44A)
  • (+18V/1.8A): LGAD amp3 --> (12V/0.26A)
• ??R36-3A (bottom)
  • (36V/3A): fan cooling cupper peltier --> (12V/3A)

• TAKASAGO ZX-S-400LN -> Cupper Peltier -> 30V/3A
• ???? -> bottom peltier -> 9V/2A
• ???? -> upper peltier -> 3.3V/1A

Telescope info.

• (upstream) KEK142, 144, 112, (V4S02, Quad, LGAD,) 134, 141, 132, 133 (downstream)
• config file:
• Latency: 232 (lv1 peak is 3-4 bc)

• bring Quad, V4S02, KEK53-12?(direct mode only)
• Yarr software: Yarr-20200117
• Yarr firmware: YARR-FW-20180921
• scan: ./bin/scanConsole -r configs/controller/specCfgFnal.json -c configs/connectivity/FNALtest_setup.json -s configs/scans/rd53a/std_xxxscan.json -p
• XpressK7 (Ohio card) -- RD53A connection
  • portA -- V4S02
  • portC -- Quad
  • portD -- Seabas via Displayport to RJ45
• Quad config file = "FNALtest_Quad.json"
  • EnCoreColSync: 0
  • SldoAnalogTrim: 22 (default)
  • SldoDigitalTrim: 22 (default)
• V4S02 config file = "FNALtest_V4S02.json"
  • EnCoreColSync: 0
  • SldoAnalogTrim: 19 (default)
  • SldoDigitalTrim: 19 (default)
• tunig: ./scripts/tune-rd53a.sh 2000 1500 10000 7 configs/controller/specCfgFnal.json configs/connectivity/FNALtest_setup.json
  • V4S02 -> data/002775_digital ~ 002790_totscan -> configs/FNALtest_V4S02.json.scrptTUNE
  • Quad -> data/0091_digital ~ 002806_totscan -> configs/FNALtest_Quad.json.scrptTUNE

15:00 security check

23:00? tune FEI4 modules and RD53A modules

25:00 control accese practice

setup overview

• LECO frame on stage at west side. fix frame on stage with LECO frame by FNAL technisians.
• other things at east side. north-east area has 3rd floors structure.
  • 1st floor: power tap x2 (DAQ and PC -> same power tap for common GND)
  • 2nd floor: HSIO2
  • 3rd floor: picoscope, Seabas, Lenovo PC, raspi, level shifter
  • other side: atlaspc14, LVx6
• On upper LECO frame: nwtwork switching hub, HV protection board
• On side LECO frame: LGAD amp3, fan cooling FEI4

SeabasTLU

• RJ45_0 -- XpressK7 portD
• CMOSin0 -- HSIO2 LEMO4 (J24)
• CMOSout0 -- picoscope chA
• CMOSout1 -- picoscope chB
• CMOSout2 -- picoscope chC
• CMOSout3 -- picoscope chD
• CMOSout8 -- HSIO2 LEMO1 (J21)
• NIMin6 -- DRS4 TRGout
• MPPCctrl{1,2,3,4} -- MPPC{1,2,3,4}

XpressK7 /RD53A

DRS4/LGAD

• strip - Amp3の配線：(ch9->J10, ch10->J9), (ch11->J12, ch12->J11), (ch13->J14, ch14->J13), (ch15->J16, ch16->J15)にしてしまった．
• LGAD pad - DRS4間のcableが短い．

Feb27,2020

15:00 beam on

system integration, alignment sensors using Online monitor

beam on time -> test

MPPC trigger test from beam

• Seabas Firmware -> LVCMOSout[0,1,2,3] = dout[0,1,2,3]
• apply HV:-55V, LV:+/-5V
• check picoscope
  • MPPC0: noisy, often send trigger signal not releated beam
  • MPPC1,2,3: looks good.
• efficiency -> uncomment in Seabas Firmware
  • Dbug(1'b1) in TLU_top
  • "4MPPC Scintilator Triggers" in TLU triggerMaker
  • i dont know more info....
  • as a results, MPPC4 (most downstream) is 30% -> should alignment? own characteristic?

• apply -20V as HV.
• do self-trigger scan and check hitmap. (calibGui)
  • some modules can detect signal from beam.
• run external-trigger scan (cosmicGui) with check on online monitor
  • edit EventLoopManager.cc in Online monitor
• signal
  • some module can detect signal from beam. but it is not good.
• Latency
  • 235 (last testbeam)-> not good
  • 240 -> bad (disappear signal)
  • 230 -> good (lv1 peak is 6 bc)
  • 232 -> best! (lv1 peak is 3-4 bc)
  • HSIO2 Latency -> 232

• test for alignment
  • apply -20V as HV to Quad and V4S02
  • run noise scan instead of exttrigger scan (external trigger scan does not work well now...)
  • can not detect signal from beam...
  • apply -50V -> no signal...
  • wrong position ??
• Timon made new firmware. install it.

備忘録

Tool関係

LGAD Amp3 - DRS4までのcableの長さはちょうどいいが，LGAD - DRS4 (degitaizer family V1742)で繋ぐ場合は短い．もう少し長いのがあるとよい．

AC power tapは全く使わなかった．

Test関係

KEK142,KEK144のchip1は熱でanalog dataがほとんど返ってこない場合がある．ファンで冷却を行った．

NIMoutは，Seabas on boardのNIMout0,1は不安定なので，Seabas Adapter BoardのNIMout2,3,4を使うべき．

LGAD DAQへのcablingは，stripのchannelとpadのchannelで分けるべき．

patch pannelからTelescopeにLVを供給するとき，GNDがHSIO2と同じになるようにする方法を模索する（今回はclip-clipでどうにか凌いだ）

Feb24,2020

Feb25,2020

Feb26,2020

02/27/2020

LGADケーブルが2本短かったので、来年は長めのやつがあると便利です。

setup at beam line

rd53a scan --> AldoAnalog/DigitalTrim 22->19

Feb24 2020

-->one for xpressk7=Lenovo laptop

Feb25

iseg software -->atlaspc9 only

iseg test→ C32 broken?

if use global network we must stop sshd system.

• 接続メモについて　 flashADC→3段目→fermi(amp種類)（予定）

• ch1→J1→J1(16ch)ch2→J2→J2(16ch) ch3→J3→J3(16ch) ch4→J4→J4(16ch) ch6→J6→J6(16ch) ch7→J7→J7(16ch) ch8→J8→J8(16ch) ch9→J9→J9(16ch) ch10→J10→J10(16ch) ch11→J11→J11(16ch) ch12→J12→J12(16ch) ch13→J13→J13(16ch) ch14→J14→J14(16ch) ch15→J15→J15(16ch) ch16→J16→J16(16ch) ch17→→J1(4ch) ch18→→J2(4ch) ch19→→J3(4ch) にする

• ←32chのADCが使えるそうで余裕をもって使えるので、実装していない16chアンプの5chと4chアンプの4chを飛ばして配線すると分かりやすいかと
• fermiの16ch ampの方と3段目のチャンネルの順番が少し違うので配線時に注意（3段目は表がJ1.3.5.7.9.11.13.15と並んでいるが、fermiの16chは1.3.5.7.10.12.14.16と並んでいる）

atlaspc14 192.168.7.111

Feb25 2020

• $ emacs -nw /etc/sysconfig/selinux

• $ echo 0 >> /etc/selinux/enable
• $ systemctrl disable firewalld

• $ source /opt/rh/devtoolset-7/enable
• $ yum install -y python-paramiko python-scp
• $ yum install -y root-physics
• $ mkdir -p /opt/AtlasRceSdk
• $ cd /opt/AtlasRceSdk
• $ wget -O - http://rceprojectportal.web.cern.ch/RceProjectPortal/software/SDK/V0.11.1.tar.gz | sudo tar xfz -
• $ cd ~/work/HSIO2_FEI4/pixelrce

• $ cd pixelrce
• $ git checkout devel
• $ cd rce
• $ source scripts/setup-dev.sh
• $ ( cd build.rce && make ) && ( cd build.host && make )
• $ rsync -rlptDv -e 'ssh -l root' build.rce/{bin,lib} rce0:/root/pixelrce

• $ emacs -nw ~/work/HSIO2_FEI4/pixelrce/rce/pixelrce/server/CalibGui.cc

• $ nmcli connection modify [eth] ipv4.never-default true（上のところにチェックが入ったことを確認）

• $ systemctrl restart dhcpd.service
• $ chkconfig dhcpd on
• $ systemctrl status dhcpd.service
• $ ping 192.168.1.10

• $ emacs -nw /etc/hosts

• $ ping rce0

• • $ emacs -nw /PATH TO SOFTWARE/scripts/setup_SeabusTLU.sh

• • $ emacs -nw /PATH TO SOFTWARE/bin/startrun
    

• • $ source /PATH TO SOFTWARE/scripts/setup_SeabusTLU.sh
  • $ ./trigenable

• $ ssh rce0 -l root
• # source setup.sh
• # calibserver

• $ source ~/daq/rce/scripts/setup-env.sh
• $ calibGui

• $ cd /PATH TO HSIO2 CONFIG/ (/home/atlasj/work/FNALtestbeam/HSIO2_FEI4/FnalPreAtKEK-20191225/rceconf/configs)
• $ cosmicGui -i 192.168.1.22 (HSIO2 IP)

• $ wavedump -> s -> shift + p

copy DAQ files (HSIO2, DRS4) to ~/work/FNALtestbeam/

• $ cd /PATH TO HSIO2 CONFIG/ (/home/atlasj/work/FNALtestbeam/HSIO2_FEI4/FnalPreAtKEK-20191225/rceconf/configs)

MPPC making

cooling system

cable making

KEK??? no event problem

baggage

cabling (MPPC, RD53, LGAD...)

allFEI4 event build check

(CYRIC: photoMOS switch check, new/old board read temperature)

• =$ git clone https://:@gitlab.cern.ch:8443/rce/pixelrce.git==

Time Schedule and To Do List

Telescope

memo:manchester encodeについて

• readout側(受け手)はclockが160MHz(6.25ns)
• command側(送り手)は40MHz(25ns)だとsignal clockにうなりが生じる->80MHz(12.5ns)にすることで改善
• ※ちなみにcommand側を160MHzにするのは難しい->送り手は丁寧なscriptを作る必要があり、受け手に比べて大変

picoscopeでcommand側を確認したところ40MHzだった。

->解決した:新しいsoftwareのGUIにmanchester encodeをON or OFFにするbuttonがあり、それがOFFになっていただけだった。

->picoscopeで確認:80MHzになっているか確認しようとしたが、結果として40MHzのものを区別するのは難しいことがわかった。

　　　　　　　　　 というもの40MHzの場合において25nsより大きいclock(山)があるとき、manchester encode機能させると波形の違いがわかるわけだが、

　　　　　　　　　 今回の場合だと25nsくらいのclock(山)だったので、周期がずれることの確認が出来ただけだった(0->1,1->0に入れ替わる)。

--MEMO--

often occur "core dump". this is because there are a lot of noise of the FEI4. if it do, you should short HV GND and LV GND, which attach jumper pin at "PHV" header pin.

manchester encodeをonにした場合におけるその他のFEI4

• KEK132(信号を送る前->送った後:1.79V,0.782A->1.79V,1.004A),KEK112(analog:1.5V,0.024A->1.499V,1.062A , didital:1.2V,0.241A->1.2V,0.124A)->config通った
• KEK134(信号を送る前->送った後:1.79V,0.772A->1.79V,0.998A),KEK112(analog:1.5V,0.023A->1.499V,1.062A , didital:1.2V,0.275A->1.2V,0.124A)->config通った
• KEK133(信号を送る前->送った後:1.79V,0.856A->1.79V,1.012A),KEK112(analog:1.5V,0.024A->1.499V,1.063A , didital:1.2V,0.278A->1.2V,0.125A)->config通った
• KEK142(信号を送る前->送った後:1.79V,0.817A->1.79V,1.038A),KEK112(analog:1.5V,0.023A->1.499V,1.061A , didital:1.2V,0.275A->1.2V,0.124A)->config通った
• KEK144(信号を送る前->送った後:1.79V,0.809A->1.79V,1.061A),KEK112(analog:1.5V,0.024A->1.499V,1.061A , didital:1.2V,0.276A->1.2V,0.124A)->config通った

• C2_0 -> KEK144, C2_1 -> KEK142
• LV : 2.0V / 2.4A
• pass config of 2 modules.

Source Scan Test to Decide Position

the FEI4s have bump peel, so we need to check where we use of each FEI4.

we use 1st chips? of all FEI4 because 2nd chips? have wide bump peeling.

KEK1?? -> all over peeling??? can not see signal from checking source for any time. (HV and LV applied properly)

同期試験（01/31/2020~）

setup about hardware

• MPPC :: Seabas MPPCctrl1(RJ45) <- MPPC "RJ45"

MPPC

temporary edit TLU_top : LVCOMSout[0] = dout[0]; //MPPC0 (line568 in PicoscopeA)

RJ45 on MPPC --- RJ45(MPPCctrl1) on TLUadaputer (not use LEMO on MPPC)

apply LV(+/-5V) and HV(-55V) to MPPC, and put Sr(90) on MPPC.

check signal from CMOSout0 (TLUadapter) by picoscope.

memo

• dout[0] is a pin of MPPCctrl1 RJ45 and is "p" LVDS signal from MPPC1.
• dout[1] is a pin of MPPCctrl1 RJ45 and is "n" LVDS signal from MPPC1.
• the LVDS signals is changed to CMOS at FPGA on Seabas.

XpressK7

use software : /home/atlasj/work/FNALtestbeam2020/XpressK7/Yarr-20200117

communication with PC and XpressK7 -> $ ./bin/specBenchmarkDma

exttrigger scan -> ./bin/scanConsole -r configs/controller/specCfgFnal.json -c configs/connectivity/example_rd53a_setup.json -s configs/scans/rd53a/fnal_exttrigger.json -m 0/1 -p

data : data/00xxxx_fnal_exttrigger/JohnDoe_0_data.raw

plotting data : $ ./plotting/read_rawData data/00xxxx_fnal_exttrigger/JohnDoe_0_data.raw

• busy 信号
  /home/atlasj/work/LGAD/DRS4/wavedump-3.10.0/src/WaveDup.cに
  CAEN=CAENComm_Write32(handle, 0x8000, 805312784);GPOにbusyを入れる
  CAEN=CAENComm_Write32(handle, 0x8110, 3);GPOから信号を出す
  を追加
  wavedump起動時にregisterを書き換えてくれるようにした
  ->trgger信号から約200us幅のNIM信号を確認

Install HSIO2 Software Into atlaspc14 (CentOS7) 26.12.2019

Telescope

Frame / cooling system

TLU / Seabas関係

MPPC関係

HSIO2 Operation

• $ ssh rce0 -l root
• # source setup.sh
• # calibserver

• 別のTerminalを開く
• $ source ~/daq/rce/scripts/setup-env.sh
• $ calibGui

• Load : KEK132_133_134_141_144
• Config Root Dir : /home/atlasj/work/HSIO2_FEI4/FnalPreAtKEK-20191225/rceconf/
• Data Dir : /home/atlasj/work/HSIO2_FEI4/FnalPreAtKEK-20191225/data/
• chose using FrontEnd at Config Halfstave A ( test KEK112 [quad] and KEK134 [double] and KEK141 [double] )

同期試験（01/31/2020）

setup

• Telescope :: Seabas CMOSout8(LEMO) -> HSIO2 "1, J21"(LEMO)
• LGAD :: Seabas NIMout(LEMO) -> DRS4 "TR0"()
• RD53A :: Seabas RJ45_0(RJ45) -> YARR "portD" via RJ45toDisplayPortAdapterBoard

• Telescope :: Seabas CMOSout8(LEMO) <- HSIO2 "4, J24"(LEMO)
• LGAD :: Seabas ??? <- DRS4 "GPO"
• RD53A :: same trigger signal system.

TLU (Seabas)

Telescope

HSIO2 Operation

LGAD

trigger : scintillator MPPC x4 (upx2, downx2)

MPPC work check, new board<-- MPPCだけ取り換え x5 (including spare). CHECK BY ocillorscope LVDS (kind of signal, this is high believed, 100Ohm terminator (between positive and negative) )

apply high vol and low vol <-- RJ45 (LVDS) threshold level change

check threshold level.

CBOS : TLU board instead of TLU box. FPGA board. FPGA board : programable. logical calculate. instead of NIM nodule. AND, OR circuit.

VERTEX5, VERTEX4 on CBOS. TLU adapter board is gaven signals and sent CBOS board. now CMOS signal is converted to ...signal by VERTEX

path : DrawRepository /2FKEK%2FFNALtb%2FTLUadaptercard%2FTLUadaptercard_revB%2FProject%20Outputs%20for%20TLUadaptercard_revB#pdfviewer

TLU data : clock timing , scinti signal.

eventsの同期 →busy signalが保証. しかし，たまにずれていることがある．オンラインモニターで常に確認すｒ必要がある．correlation．

each DAQ system.

FEI4 NIMでbusyやsignalを受け取れるかcheck.

FEI4 x6 module working check, bump剥がれの位置をcheck, FEI4 tuning, test with ALL 6 FEI4.

when auto trigger mode on FPGA, FEI4 sent signal. (trigger handling)

RD53A trigger handling. event counts.

LGAD DAQ : DRS4 flash ADC 200ps charge signal.

• $ nmcli connection modify [eth] ipv4.never-default true（上のところにチェックが入ったことを確認）

• $ systemctrl restart dhcpd.service
• $ chkconfig dhcpd on
• $ systemctrl status dhcpd.service
• $ ping 192.168.1.10

• C2_0 -> KEK144, C2_1 -> KEK142
• LV : 2.0V / 2.4A
• pass config of 2 modules.

• • $ emacs -nw /PATH TO SOFTWARE/scripts/setup_SeabusTLU.sh

• • $ emacs -nw /PATH TO SOFTWARE/bin/startrun