Difference: Feb2019TestbeamLog (51 vs. 52)

Revision 522019-02-28 - AtlasjSilicon

Line: 1 to 1
 
META TOPICPARENT name="FermilabTestbeamTop"

Feb2019TestbeamLog

Line: 505 to 505
  DRS4 busy長くしてもeventがHSIO2と同期しない
Added:
>
>
rate 低くなるのでbusyの長さは元に戻す
 
[PM]

午前の終わりにFEI4のHV落としている時にまたカレントトリップ。

Line: 519 to 520
  横1934.7
Added:
>
>
DRS4のtrigger inをtで分けてたのをそれぞれTLUから出す

NIMOUT3->group0,1(strip) NIMOUT4->group2,3(pad)

NIMIN   NIMOUT   CMOSIN   CMOSOUT   LVDS  
4 ROItrg 3 DRS4trg_group0,1 0 pico gene 0 pico A in0 MPPC上
6 DRS4busy 4 DRS4trg_group2,3 6 HSIO2busy 1 pico B in1 MPPC下
            2 pico C out1 xpressK7 trg
            3 pico D in0 xpressK7 busy
            4 pico ext    
            8 HSIO2trg    
[17:54]

HSOI2とDRS4のeventがほぼ同期

 

2019/2/28

[AM]
[PM]
 
This site is powered by the TWiki collaboration platform Powered by PerlCopyright © 2008-2024 by the contributing authors. All material on this collaboration platform is the property of the contributing authors.
Ideas, requests, problems regarding TWiki? Send feedback