Difference: FE65p2ChipDAQ (3 vs. 4)

Revision 42016-05-25 - KojiNakamura

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DAQ development for FE65-P2 chip

DAQ development for FE65-P2 chip

Introduction

FE65-P2 is the readout ASIC with 65nm processing as pre-pre-production for the RD53A /B chips used by HL-LHC ITK pixel upgrade.

more information is available in :

motivation talk in AUW April 2016

Timon's talk in AUW April 2016

Bump Bonding at SLAC

DAQ development by SPEC

Installed CERN CentOS7 to pcatutt21.cern.ch
Installed SLC6 to keksipc01 : at KEK ip=130.87.243.35

Images


DSC_1418	DSC_1420	DSC_1421	DSC_1423

DSC_1424	DSC_1425	DSC_1426	DSC_1434

DSC_1459	DSC_1464	DSC_1466	DSC_1467

DSC_1505	DSC_1509	DSC_1510	IMG_1573

IMG_1574	IMG_1575	IMG_1576	PL21_bottom

PL21_bottom_middle	PL51_bottom	PL51_bottom_middle	PL51_bottom_right

There are 24 images in this page

-- Koji Nakamura - 2016-04-21

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