DAQ development for FE65-P2 chip

Introduction

FE65-P2 is the readout ASIC with 65nm processing as pre-pre-production for the RD53A/B chips used by HL-LHC ITK pixel upgrade.

more information is available in :

motivation talk in AUW April 2016

Timon's talk in AUW April 2016

Timon's Twiki

Chips and Bump Bonding at SLAC

sensor name,bias(type), condition, patch work, dose,

DAQ development by SPEC

• Installed CERN CentOS7 to pcatutt21.cern.ch
• Installed SLC6 to keksipc01 : at KEK ip=130.87.243.35

How to setup SPEC board

• on SLC6 or CentOS7
  • need devtoolset-2 for gcc48
• install font for gnuplot

  sudo yum -y install xorg-x11-fonts-ISO8859*

• install software and firmware from git

mkdir -p /home/atlasj/work/SPEC/YARR 
cd /home/atlasj/work/SPEC/YARR/
git clone https://github.com/Yarr/Yarr.git
git fetch
git checkout fe65_p2
cd /home/atlasj/work/SPEC/YARR/Yarr/src/kernel
make
sudo make install
sudo depmod
cd ../ ; make

• install driver and program firmware to the SPEC card FPGAsudo rmmod specDriver

sudo modprobe  specDriver
bin/programFpga ../hdl/syn/yarr_fe65p2_revB.bit
bin/test

bin/benchmarkDma 

How to configure chips and run scan

tuning

1. source gcc4.8.2

   source /opt/rh/devtool/set_2/enable

2. write FPGA

   cd /home/atlasj/work/SPEC/Yarr/src
   ./bin/programFpga ../hdl/syn/yarr_fe65p2_revB.bit

3. Delete fe65p2.json

   cd ~/work/SPEC/Yarr/src
   rm -f fe65p2.json

4. Digital scan

   ./primlist/scan.sh digitalscan <KEKFE65-(module #)_th(threshold)>

5. Analog scan

   ./primlist/scan.sh analogscan <KEKFE65-(module #)_th(threshold)>

6. Threshold scan

   ./primlist/scan.sh thresholdscan <KEKFE65-(module #)_th(threshold)>

7. Grobal tuning
   change Vthin1 and Vthin2 (fe65p2.json)
   differential threshold: threshold=Vthin1-Vthin2 ※Vthin2>25
   
   
8. set thresold tuning target
   edit Line147 in scanconsole65.cpp

   bookiie.setTargetThreshold(threshold) 

9. Local tuning

   ./primlist/scan.sh tune_pixelthreshold <KEKFE65-(module #)_th(threshold)>

General scan consol

HitOr self trigger scan

1. Run digital scan
2. Run analog scan
3. Prepare config:
- Enable all pixels: # bin/config_fe65-p2 fe65p2.json (Overwrites config file)
- Apply digital scan mask: # bin/applyMask fe65p2_ch0_digitalscan_EnMask.dat fe65p2.json
- Copy masked config: # cp masked_fe65p2.json fe65p2.json
- Apply analog scan mask: # bin/applyMask fe65p2_ch0_analogscan_EnMask.dat fe65p2.json
- Copy masked config: # cp masked_fe65p2.json fe65p2.json
4. Run noise scan (~5min)
5. Apply noise mask:
- Apply digital scan mask: # bin/applyMask fe65p2_ch0_noisescan_NoiseMask.dat fe65p2.json
- Copy masked config: # cp masked_fe65p2.json fe65p2.json
6. Mask stuck/noise hitter pixels:
- #bin/fixHitbus fe65p2.json (takes quite some time ~15min)
- Only pixels which will get masked get printed to stdout, optimally these should not be many
- If many pixels appear to not work something is wrong
- You can observe the process by probing HitOr Output and Trigger, there should be two hitOr pulses per trigger
- The program produces a mask hitbus_enMask.png
- Copy masked config: # cp masked_fe65p2.json fe65p2.json
7. Run exttrigger scan:
- If everything went right you should observe a trigger rate of a few Hz without a particle source
- With source the rate should be much higher
- The internal dead time is 200bc (currently hardcoded for testing)

Images

DSC_1418	DSC_1420	DSC_1421	DSC_1423
DSC_1424	DSC_1425	DSC_1426	DSC_1434
DSC_1459	DSC_1464	DSC_1466	DSC_1467
DSC_1505	DSC_1509	DSC_1510	IMG_1573
IMG_1574	IMG_1575	IMG_1576	PL21_bottom
PL21_bottom_middle	PL51_bottom	PL51_bottom_middle	PL51_bottom_right

-- Koji Nakamura - 2016-04-21